public inbox for linux-kernel@vger.kernel.org
 help / color / mirror / Atom feed
From: Jisheng Zhang <jszhang3@mail.ustc.edu.cn>
To: Palmer Dabbelt <palmer@dabbelt.com>
Cc: emil.renner.berthing@gmail.com, alex@ghiti.fr,
	Paul Walmsley <paul.walmsley@sifive.com>,
	aou@eecs.berkeley.edu, jszhang@kernel.org,
	Christoph Hellwig <hch@infradead.org>,
	zong.li@sifive.com, anup@brainfault.org,
	linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v4 1/4] riscv: Remove CONFIG_PHYS_RAM_BASE_FIXED
Date: Sun, 13 Jun 2021 08:44:47 +0800	[thread overview]
Message-ID: <20210613084447.6db3cc02@xhacker> (raw)
In-Reply-To: <mhng-dfabeabd-e6df-4035-a9d0-c16269390120@palmerdabbelt-glaptop>

On Sat, 12 Jun 2021 17:23:51 -0700 (PDT)
Palmer Dabbelt <palmer@dabbelt.com> wrote:

> On Sat, 12 Jun 2021 16:23:03 PDT (-0700), emil.renner.berthing@gmail.com wrote:
> > On Fri, 4 Jun 2021 at 13:51, Alexandre Ghiti <alex@ghiti.fr> wrote:  
> >>
> >> Make the physical RAM base address available for all kernels, not only
> >> XIP kernels as it will allow to simplify address conversions macros.  
> >
> > Am I just reading it wrong or won't this patch make it so that the same kernel
> > can't run on two chips with physical ram starting at different addresses?

I mentioned this point in http://lists.infradead.org/pipermail/linux-riscv/2021-June/006840.html  

> 
> IIUC we were in that position, at least without relocatable kernels.  
> Maybe I'm misunderstanding this, though?

Just my humble opinion, before this series patch, at least geneirc Image
for RV64 + MMU + !XIP is doable.

Thanks

> 
> >
> > /Emil
> >  
> >> ---
> >>  arch/riscv/Kconfig | 6 ------
> >>  1 file changed, 6 deletions(-)
> >>
> >> diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
> >> index b58596b141fc..3d8e7e4bb45c 100644
> >> --- a/arch/riscv/Kconfig
> >> +++ b/arch/riscv/Kconfig
> >> @@ -493,13 +493,8 @@ config STACKPROTECTOR_PER_TASK
> >>         def_bool y
> >>         depends on STACKPROTECTOR && CC_HAVE_STACKPROTECTOR_TLS
> >>
> >> -config PHYS_RAM_BASE_FIXED
> >> -       bool "Explicitly specified physical RAM address"
> >> -       default n
> >> -
> >>  config PHYS_RAM_BASE
> >>         hex "Platform Physical RAM address"
> >> -       depends on PHYS_RAM_BASE_FIXED
> >>         default "0x80000000"
> >>         help
> >>           This is the physical address of RAM in the system. It has to be
> >> @@ -512,7 +507,6 @@ config XIP_KERNEL
> >>         # This prevents XIP from being enabled by all{yes,mod}config, which
> >>         # fail to build since XIP doesn't support large kernels.
> >>         depends on !COMPILE_TEST
> >> -       select PHYS_RAM_BASE_FIXED
> >>         help
> >>           Execute-In-Place allows the kernel to run from non-volatile storage
> >>           directly addressable by the CPU, such as NOR flash. This saves RAM
> >> --
> >> 2.30.2
> >>
> >>
> >> _______________________________________________
> >> linux-riscv mailing list
> >> linux-riscv@lists.infradead.org
> >> http://lists.infradead.org/mailman/listinfo/linux-riscv  
> 
> _______________________________________________
> linux-riscv mailing list
> linux-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv



  reply	other threads:[~2021-06-13  0:54 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-06-04 11:49 [PATCH v4 0/4] riscv: Map the kernel with correct permissions the first time Alexandre Ghiti
2021-06-04 11:49 ` [PATCH v4 1/4] riscv: Remove CONFIG_PHYS_RAM_BASE_FIXED Alexandre Ghiti
2021-06-12 23:23   ` Emil Renner Berthing
2021-06-13  0:23     ` Palmer Dabbelt
2021-06-13  0:44       ` Jisheng Zhang [this message]
2021-06-13  6:14         ` Alex Ghiti
2021-06-04 11:49 ` [PATCH v4 2/4] riscv: Simplify xip and !xip kernel address conversion macros Alexandre Ghiti
2021-06-04 12:47   ` Jisheng Zhang
2021-06-06  7:38     ` Alex Ghiti
2021-06-04 11:49 ` [PATCH v4 3/4] riscv: Introduce set_kernel_memory helper Alexandre Ghiti
2021-06-04 11:49 ` [PATCH v4 4/4] riscv: Map the kernel with correct permissions the first time Alexandre Ghiti
2021-06-12  3:55 ` [PATCH v4 0/4] " Palmer Dabbelt

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20210613084447.6db3cc02@xhacker \
    --to=jszhang3@mail.ustc.edu.cn \
    --cc=alex@ghiti.fr \
    --cc=anup@brainfault.org \
    --cc=aou@eecs.berkeley.edu \
    --cc=emil.renner.berthing@gmail.com \
    --cc=hch@infradead.org \
    --cc=jszhang@kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-riscv@lists.infradead.org \
    --cc=palmer@dabbelt.com \
    --cc=paul.walmsley@sifive.com \
    --cc=zong.li@sifive.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox