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From: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
To: Rahul Tanwar <rtanwar@maxlinear.com>, bhelgaas@google.com
Cc: robh@kernel.org, kw@linux.com, jingoohan1@gmail.com,
	gustavo.pimentel@synopsys.com, linux-pci@vger.kernel.org,
	linux-kernel@vger.kernel.org, ckim@maxlinear.com,
	qwu@maxlinear.com, rahul.tanwar.linux@gmail.com
Subject: Re: [PATCH] PCI: dwc/intel-gw: Update MAINTAINERS file
Date: Fri, 23 Jul 2021 16:28:05 +0100	[thread overview]
Message-ID: <20210723152805.GA4103@lpieralisi> (raw)
In-Reply-To: <b3249e08155e04ac08d820be3b8da29a913c472a.1625559158.git.rtanwar@maxlinear.com>

On Tue, Jul 06, 2021 at 04:20:59PM +0800, Rahul Tanwar wrote:
> Add maintainer for PCIe RC controller driver for Intel LGM gateway SoC.
> 
> Signed-off-by: Rahul Tanwar <rtanwar@maxlinear.com>
> ---
>  MAINTAINERS | 7 +++++++
>  1 file changed, 7 insertions(+)
> 
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 3298f4592ce7..61c1cfcc453b 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -14392,6 +14392,13 @@ S:	Maintained
>  F:	Documentation/devicetree/bindings/pci/hisilicon-histb-pcie.txt
>  F:	drivers/pci/controller/dwc/pcie-histb.c
>  
> +PCIE DRIVER FOR INTEL LGM GW SOC
> +M:	Rahul Tanwar <rtanwar@maxlinear.com>
> +L:	linux-pci@vger.kernel.org
> +S:	Maintained
> +F:	Documentation/devicetree/bindings/pci/intel-gw-pcie.yaml
> +F:	drivers/pci/controller/dwc/pcie-intel-gw.c
> +

Hi Bjorn,

do you think we can merge this patch as a fix in one of the upcoming
-rcX ?

Please let me know, thanks.

Lorenzo

  reply	other threads:[~2021-07-23 15:30 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-07-06  8:20 [PATCH] PCI: dwc/intel-gw: Update MAINTAINERS file Rahul Tanwar
2021-07-23 15:28 ` Lorenzo Pieralisi [this message]
2021-07-23 21:09   ` Bjorn Helgaas

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