From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.3 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_2 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C56F4C4338F for ; Mon, 16 Aug 2021 07:31:41 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id AA6F361AA3 for ; Mon, 16 Aug 2021 07:31:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234117AbhHPHcJ convert rfc822-to-8bit (ORCPT ); Mon, 16 Aug 2021 03:32:09 -0400 Received: from relay2-d.mail.gandi.net ([217.70.183.194]:35503 "EHLO relay2-d.mail.gandi.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233906AbhHPHcA (ORCPT ); Mon, 16 Aug 2021 03:32:00 -0400 Received: (Authenticated sender: miquel.raynal@bootlin.com) by relay2-d.mail.gandi.net (Postfix) with ESMTPSA id 8CE7540002; Mon, 16 Aug 2021 07:31:27 +0000 (UTC) Date: Mon, 16 Aug 2021 09:31:26 +0200 From: Miquel Raynal To: Daniel Kestrel Cc: Richard Weinberger , Vignesh Raghavendra , linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v2] mtd: rawnand: xway: No hardcoded ECC engine, use device tree setting Message-ID: <20210816093126.442f74a1@xps13> In-Reply-To: <20210808072643.GA5084@ubuntu> References: <20210808072643.GA5084@ubuntu> Organization: Bootlin X-Mailer: Claws Mail 3.17.7 (GTK+ 2.24.32; x86_64-pc-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8BIT Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Daniel, Daniel Kestrel wrote on Sun, 8 Aug 2021 09:26:43 +0200: > Some devices use Micron NAND chips, which use on-die ECC. The hardcoded > setting of NAND_ECC_ENGINE_TYPE_SOFT makes them unusable, because the > software ECC on top of the hardware ECC produces errors for every read > and write access, not to mention that booting does not work, because > the boot loader uses the correct ECC when trying to load the kernel > and stops loading on severe ECC errors. > This patch requires the devices that currently work with the hard coded > setting to set the nand-ecc-mode property to soft in their device > tree. > Please add a Fixes: and Cc: stable tags, you will also need to send to stable@vger.kernel.org a different version of the patch for the kernel 5.4 IIUC. > Signed-off-by: Daniel Kestrel > Tested-by: Aleksander Jan Bajkowski # tested on BT Home Hub 5A > --- > drivers/mtd/nand/raw/xway_nand.c | 2 -- > 1 file changed, 2 deletions(-) > > diff --git a/drivers/mtd/nand/raw/xway_nand.c b/drivers/mtd/nand/raw/xway_nand.c > index 26751976e502..0a4b0aa7dd4c 100644 > --- a/drivers/mtd/nand/raw/xway_nand.c > +++ b/drivers/mtd/nand/raw/xway_nand.c > @@ -148,8 +148,6 @@ static void xway_write_buf(struct nand_chip *chip, const u_char *buf, int len) > > static int xway_attach_chip(struct nand_chip *chip) > { > - chip->ecc.engine_type = NAND_ECC_ENGINE_TYPE_SOFT; > - > if (chip->ecc.algo == NAND_ECC_ALGO_UNKNOWN) > chip->ecc.algo = NAND_ECC_ALGO_HAMMING; You also need to only set the Hamming algorithm when engine_type is TYPE_SOFT. Thanks, Miquèl