[PATCH AUTOSEL 5.13 136/219] arm64: dts: imx8mm-venice-gw700x: fix invalid pmic pin config

Sasha Levin
2021-09-09T12:24:17Z

From: Tim Harvey <tharvey@gateworks.com>

[ Upstream commit 500659f3b401fe6ffd1d63f2449d16d8a4204db7 ]

The GW700x PMIC does not have an interrupt. Remove the invalid pin
config.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
---
arch/arm64/boot/dts/freescale/imx8mm-venice-gw700x.dtsi | 8 --------
1 file changed, 8 deletions(-)

diff --git a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw700x.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw700x.dtsi
index 11dda79cc46b..00f86cada30d 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw700x.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw700x.dtsi
@@ -278,8 +278,6 @@ rtc@68 {

pmic@69 {
compatible = "mps,mp5416";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_pmic>;
reg = <0x69>;

regulators {
@@ -444,12 +442,6 @@ MX8MM_IOMUXC_I2C2_SDA_I2C2_SDA 0x400001c3
>;
};

- pinctrl_pmic: pmicgrp {
- fsl,pins = <
- MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x41
- >;
- };
-
pinctrl_uart2: uart2grp {
fsl,pins = <
MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX 0x140
--
2.30.2