Re: [PATCH v2 02/14] mtd: spinand: Add enum spinand_proto to indicate current SPI IO mode

Boris Brezillon
2021-10-12T06:39:18Z

On Tue, 12 Oct 2021 02:16:07 +0530
Apurva Nandan <a-nandan@ti.com> wrote:

> Unlike Dual and Quad SPI modes flashes, Octal DTR SPI NAND flashes
> require all instructions to be made in 8D-8D-8D protocol when the
> flash is in Octal DTR mode. Hence, storing the current SPI IO mode
> becomes necessary for correctly generating non-array access operations.
>
> Store the current SPI IO mode in the spinand struct using a reg_proto
> enum. This would act as a flag, denoting that the core should use
> the given SPI protocol for non-page access operations.
>
> Also provide basic macros for extracting buswidth and dtr mode
> information from the spinand_proto enum.
>
> Signed-off-by: Apurva Nandan <a-nandan@ti.com>
> ---
> drivers/mtd/nand/spi/core.c | 2 ++
> include/linux/mtd/spinand.h | 30 ++++++++++++++++++++++++++++++
> 2 files changed, 32 insertions(+)
>
> diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c
> index 2c8685f1f2fa..d82a3e6d9bb5 100644
> --- a/drivers/mtd/nand/spi/core.c
> +++ b/drivers/mtd/nand/spi/core.c
> @@ -1155,6 +1155,7 @@ static void spinand_mtd_resume(struct mtd_info *mtd)
> struct spinand_device *spinand = mtd_to_spinand(mtd);
> int ret;
>
> + spinand->reg_proto = SPINAND_SINGLE_STR;
> ret = spinand_reset_op(spinand);
> if (ret)
> return;
> @@ -1181,6 +1182,7 @@ static int spinand_init(struct spinand_device *spinand)
> if (!spinand->scratchbuf)
> return -ENOMEM;
>
> + spinand->reg_proto = SPINAND_SINGLE_STR;
> ret = spinand_detect(spinand);
> if (ret)
> goto err_free_bufs;
> diff --git a/include/linux/mtd/spinand.h b/include/linux/mtd/spinand.h
> index 6988956b8492..f6093cd98d7b 100644
> --- a/include/linux/mtd/spinand.h
> +++ b/include/linux/mtd/spinand.h
> @@ -140,6 +140,31 @@
> SPI_MEM_OP_NO_DUMMY, \
> SPI_MEM_OP_DATA_OUT(len, buf, 4))
>
> +#define SPINAND_PROTO_BUSWIDTH_MASK GENMASK(6, 0)
> +#define SPINAND_PROTO_DTR_BIT BIT(7)
> +
> +#define SPINAND_PROTO_STR(__buswidth) \
> + ((u8)(((__buswidth) - 1) & SPINAND_PROTO_BUSWIDTH_MASK))
> +#define SPINAND_PROTO_DTR(__buswidth) \
> + (SPINAND_PROTO_DTR_BIT | SPINAND_PROTO_STR(__buswidth))
> +
> +#define SPINAND_PROTO_BUSWIDTH(__proto) \
> + ((u8)(((__proto) & SPINAND_PROTO_BUSWIDTH_MASK) + 1))
> +#define SPINAND_PROTO_IS_DTR(__proto) (!!((__proto) & SPINAND_PROTO_DTR_BIT))
> +
> +/**
> + * enum spinand_proto - List allowable SPI protocol variants for read reg,
> + * write reg, blk erase, write enable/disable, page read
> + * and program exec operations.
> + */
> +enum spinand_proto {

s/spinand_proto/spinand_protocol/

> + SPINAND_SINGLE_STR = SPINAND_PROTO_STR(1),
> + SPINAND_DUAL_STR = SPINAND_PROTO_STR(2),
> + SPINAND_QUAD_STR = SPINAND_PROTO_STR(4),
> + SPINAND_OCTAL_STR = SPINAND_PROTO_STR(8),
> + SPINAND_OCTAL_DTR = SPINAND_PROTO_DTR(8),

Why not have a contiguous enum listing all the modes? Are you extracting
the buswidth from these values?

> +};
> +
> /**
> * Standard SPI NAND flash commands
> */
> @@ -407,6 +432,9 @@ struct spinand_dirmap {
> * this die. Only required if your chip exposes several dies
> * @cur_target: currently selected target/die
> * @eccinfo: on-die ECC information
> + * @reg_proto: select a variant of SPI IO protocol (single, quad, octal or
> + * octal DTR) for read_reg/write_reg/erase operations. Update on
> + * successful transition into a different SPI IO protocol.
> * @cfg_cache: config register cache. One entry per die
> * @databuf: bounce buffer for data
> * @oobbuf: bounce buffer for OOB data
> @@ -438,6 +466,8 @@ struct spinand_device {
>
> struct spinand_ecc_info eccinfo;
>
> + enum spinand_proto reg_proto;
> +

I guess this mode will apply to all sort of commands, not just reg
accesses, so why not name it protocol or mode?

> u8 *cfg_cache;
> u8 *databuf;
> u8 *oobbuf;