From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id DF905C433EF for ; Wed, 20 Oct 2021 11:00:41 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id C2CB16136A for ; Wed, 20 Oct 2021 11:00:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230191AbhJTLCx (ORCPT ); Wed, 20 Oct 2021 07:02:53 -0400 Received: from mga02.intel.com ([134.134.136.20]:39330 "EHLO mga02.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230063AbhJTLCq (ORCPT ); Wed, 20 Oct 2021 07:02:46 -0400 X-IronPort-AV: E=McAfee;i="6200,9189,10142"; a="215917465" X-IronPort-AV: E=Sophos;i="5.87,166,1631602800"; d="scan'208";a="215917465" Received: from orsmga006.jf.intel.com ([10.7.209.51]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Oct 2021 04:00:32 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.87,166,1631602800"; d="scan'208";a="444322953" Received: from nntpdsd52-165.inn.intel.com ([10.125.52.165]) by orsmga006.jf.intel.com with ESMTP; 20 Oct 2021 04:00:31 -0700 From: alexander.antonov@linux.intel.com To: peterz@infradead.org, linux-kernel@vger.kernel.org Cc: kan.liang@linux.intel.com, ak@linux.intel.com, alexey.v.bayduraev@linux.intel.com, alexander.antonov@linux.intel.com Subject: [RESEND PATCH 1/3] Fix filter_tid mask for CHA events on Skylake Server Date: Wed, 20 Oct 2021 14:00:26 +0300 Message-Id: <20211020110028.38781-2-alexander.antonov@linux.intel.com> X-Mailer: git-send-email 2.21.3 In-Reply-To: <20211020110028.38781-1-alexander.antonov@linux.intel.com> References: <20211020110028.38781-1-alexander.antonov@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Alexander Antonov According Uncore Reference Manual: any of the CHA events may be filtered by Thread/Core-ID by using tid modifier in CHA Filter 0 Register. Update skx_cha_hw_config() to follow Uncore Guide. Fixes: cd34cd97b7b4 ("perf/x86/intel/uncore: Add Skylake server uncore support") Reviewed-by: Kan Liang Signed-off-by: Alexander Antonov --- arch/x86/events/intel/uncore_snbep.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/arch/x86/events/intel/uncore_snbep.c b/arch/x86/events/intel/uncore_snbep.c index 5ddc0f30db6f..9cc65a4194ce 100644 --- a/arch/x86/events/intel/uncore_snbep.c +++ b/arch/x86/events/intel/uncore_snbep.c @@ -3607,7 +3607,9 @@ static int skx_cha_hw_config(struct intel_uncore_box *box, struct perf_event *ev { struct hw_perf_event_extra *reg1 = &event->hw.extra_reg; struct extra_reg *er; - int idx = 0; + /* Any of the CHA events may be filtered by Thread/Core-ID.*/ + int idx = !!(event->hw.config & SNBEP_CBO_PMON_CTL_TID_EN) ? + SKX_CHA_MSR_PMON_BOX_FILTER_TID : 0; for (er = skx_uncore_cha_extra_regs; er->msr; er++) { if (er->event != (event->hw.config & er->config_mask)) -- 2.21.3