From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A1D4DC433EF for ; Tue, 2 Nov 2021 17:44:23 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 8B72661051 for ; Tue, 2 Nov 2021 17:44:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234768AbhKBRq5 (ORCPT ); Tue, 2 Nov 2021 13:46:57 -0400 Received: from mail.kernel.org ([198.145.29.99]:42750 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234734AbhKBRq4 (ORCPT ); Tue, 2 Nov 2021 13:46:56 -0400 Received: by mail.kernel.org (Postfix) with ESMTPSA id BA5F761050; Tue, 2 Nov 2021 17:44:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1635875061; bh=iahJFRZcx1MxL+M2Ajyus8wDKsnumh0QcA3DdNHQiCI=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=Vvh2zW9D1d2AV+xkYpTnJ9L4N5nmpPTswlC/i1On5byzt10F8fzkqYN0NxBTrZN+j EK34IU6acfGRKyziVzs/qgIgdiAYf7Wo5PN+bmve/h480BHGum/BiCrN2xAMYkGb9p mUksj0v1L6DBHs4f2oFGlxEeq0wh69PDlllBkflbjyeCwB7Kk9Sx15fTNlKXDCYT2e tWUR0Pgtn+CNCdN8UHW/cxBAS90IrKYOSkCXki6UIBDp4Q/YY/N+dbrlKqcSPEmIkw +QFHyW/dGz7VfTDCbm92jbcMgp4E5vsGXX7WTsgKSUVKISCUFRBXQRCUB/L6foINOC wo2Xq2hDG8Vng== Date: Tue, 2 Nov 2021 17:44:15 +0000 From: Mauro Carvalho Chehab To: Bjorn Helgaas Cc: Rob Herring , Lorenzo Pieralisi , linuxarm@huawei.com, mauro.chehab@huawei.com, Krzysztof =?UTF-8?B?V2lsY3p5xYRza2k=?= , Binghui Wang , Bjorn Helgaas , Xiaowei Song , linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, Kishon Vijay Abraham I Subject: Re: [PATCH v15 04/13] PCI: kirin: Add support for bridge slot DT schema Message-ID: <20211102174415.58cd3d4f@sal.lan> In-Reply-To: <20211102160612.GA612467@bhelgaas> References: <20211102160612.GA612467@bhelgaas> X-Mailer: Claws Mail 3.18.0 (GTK+ 2.24.33; x86_64-redhat-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Bjorn, Em Tue, 2 Nov 2021 11:06:12 -0500 Bjorn Helgaas escreveu: > > + > > + /* Per-slot clkreq */ > > + int n_gpio_clkreq; > > + int gpio_id_clkreq[MAX_PCI_SLOTS]; > > + const char *clkreq_names[MAX_PCI_SLOTS]; > > I think there's been previous discussion about this, but I didn't > follow it, so I'm just double-checking that this is what we want here. > > IIUC, this (MAX_PCI_SLOTS, "hisilicon,clken-gpios") applies to an > external PEX 8606 bridge, which seems a little strange to be > hard-coded into the kirin driver this way. > > I see that "hisilicon,clken-gpios" is optional, but what if some > platform connects all 6 lanes? What if there's a different bridge > altogether? > > I'll assume this is actually the way we want thing unless I hear > otherwise. Yes, there was past discussions about that with Rob, with regards to how the DT would represent it, which got reflected at the code. At the end, it was decided to just add a single property inside PCIe: pcie@f4000000 { compatible = "hisilicon,kirin970-pcie"; ... hisilicon,clken-gpios = <&gpio27 3 0>, <&gpio17 0 0>, <&gpio20 6 0>; I don't think this is a problem, as, if some day another bridge would need a larger number of slots, it is just a matter of changing the number at the MAX_PCI_SLOTS, as this controls only the size of the array (and the check for array overflow when parsing the properties). Regards, Mauro