From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D0D81C433F5 for ; Mon, 15 Nov 2021 23:08:56 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id B6858611C5 for ; Mon, 15 Nov 2021 23:08:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1350821AbhKOXLt (ORCPT ); Mon, 15 Nov 2021 18:11:49 -0500 Received: from mail.kernel.org ([198.145.29.99]:36766 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S243891AbhKOTEg (ORCPT ); Mon, 15 Nov 2021 14:04:36 -0500 Received: by mail.kernel.org (Postfix) with ESMTPSA id E171C6337D; Mon, 15 Nov 2021 18:16:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1637000163; bh=LjFKE9+1RM1tT2sljyVQv5wTmoWTWR70ZMYWCqhLrdU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=sgHd9UZB9JQEt7enEoM6yaXpSZP923269NqFgDl9qF0nCKdXaFoyg81Tv/lB7jWam sMfbrq1rRtDYt/MuyS7F1FzdmwO0We2BEuLmoVJQRVN9NWvvTyRSpvEHp8AyEXQWHk EqIUTBsOofOcxEBC/OdJ32ZCdRPrkuGhMWgeStOg= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Alex Bee , Heiko Stuebner , Sasha Levin Subject: [PATCH 5.14 559/849] arm64: dts: rockchip: Fix GPU register width for RK3328 Date: Mon, 15 Nov 2021 18:00:42 +0100 Message-Id: <20211115165439.168584125@linuxfoundation.org> X-Mailer: git-send-email 2.33.1 In-Reply-To: <20211115165419.961798833@linuxfoundation.org> References: <20211115165419.961798833@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Alex Bee [ Upstream commit 932b4610f55b49f3a158b0db451137bab7ed0e1f ] As can be seen in RK3328's TRM the register range for the GPU is 0xff300000 to 0xff330000. It would (and does in vendor kernel) overlap with the registers of the HEVC encoder (node/driver do not exist yet in upstream kernel). See already existing h265e_mmu node. Fixes: 752fbc0c8da7 ("arm64: dts: rockchip: add rk3328 mali gpu node") Signed-off-by: Alex Bee Link: https://lore.kernel.org/r/20210623115926.164861-1-knaerzche@gmail.com Signed-off-by: Heiko Stuebner Signed-off-by: Sasha Levin --- arch/arm64/boot/dts/rockchip/rk3328.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi index 8c821acb21ffb..da84be6f4715e 100644 --- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi @@ -599,7 +599,7 @@ gpu: gpu@ff300000 { compatible = "rockchip,rk3328-mali", "arm,mali-450"; - reg = <0x0 0xff300000 0x0 0x40000>; + reg = <0x0 0xff300000 0x0 0x30000>; interrupts = , , , -- 2.33.0