From: Jason Gunthorpe <jgg@nvidia.com>
To: Jacob Pan <jacob.jun.pan@linux.intel.com>
Cc: iommu@lists.linux-foundation.org,
LKML <linux-kernel@vger.kernel.org>,
Joerg Roedel <joro@8bytes.org>,
Christoph Hellwig <hch@infradead.org>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Jean-Philippe Brucker <jean-philippe@linaro.com>,
Jacob Pan <jacob.jun.pan@intel.com>,
Lu Baolu <baolu.lu@linux.intel.com>,
Raj Ashok <ashok.raj@intel.com>,
"Kumar, Sanjay K" <sanjay.k.kumar@intel.com>,
Dave Jiang <dave.jiang@intel.com>,
Tony Luck <tony.luck@intel.com>, Yi Liu <yi.l.liu@intel.com>,
"Tian, Kevin" <kevin.tian@intel.com>,
Barry Song <21cnbao@gmail.com>,
"Zanussi, Tom" <tom.zanussi@intel.com>,
Dan Williams <dan.j.williams@intel.com>
Subject: Re: [PATCH 3/4] iommu/vt-d: Support PASID DMA for in-kernel usage
Date: Wed, 8 Dec 2021 09:22:55 -0400 [thread overview]
Message-ID: <20211208132255.GS6385@nvidia.com> (raw)
In-Reply-To: <1638884834-83028-4-git-send-email-jacob.jun.pan@linux.intel.com>
On Tue, Dec 07, 2021 at 05:47:13AM -0800, Jacob Pan wrote:
> Between DMA requests with and without PASID (legacy), DMA mapping APIs
> are used indiscriminately on a device. Therefore, we should always match
> the addressing mode of the legacy DMA when enabling kernel PASID.
>
> This patch adds support for VT-d driver where the kernel PASID is
> programmed to match RIDPASID. i.e. if the device is in pass-through, the
> kernel PASID is also in pass-through; if the device is in IOVA mode, the
> kernel PASID will also be using the same IOVA space.
>
> There is additional handling for IOTLB and device TLB flush w.r.t. the
> kernel PASID. On VT-d, PASID-selective IOTLB flush is also on a
> per-domain basis; whereas device TLB flush is per device. Note that
> IOTLBs are used even when devices are in pass-through mode. ATS is
> enabled device-wide, but the device drivers can choose to manage ATS at
> per PASID level whenever control is available.
>
> Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com>
> drivers/iommu/intel/iommu.c | 105 +++++++++++++++++++++++++++++++++++-
> drivers/iommu/intel/pasid.c | 7 +++
> include/linux/intel-iommu.h | 3 +-
> 3 files changed, 113 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c
> index 60253bc436bb..a2ef6b9e4bfc 100644
> +++ b/drivers/iommu/intel/iommu.c
> @@ -1743,7 +1743,14 @@ static void domain_flush_piotlb(struct intel_iommu *iommu,
> if (domain->default_pasid)
> qi_flush_piotlb(iommu, did, domain->default_pasid,
> addr, npages, ih);
> -
> + if (domain->kernel_pasid && !domain_type_is_si(domain)) {
> + /*
> + * REVISIT: we only do PASID IOTLB inval for FL, we could have SL
> + * for PASID in the future such as vIOMMU PT. this doesn't get hit.
> + */
> + qi_flush_piotlb(iommu, did, domain->kernel_pasid,
> + addr, npages, ih);
> + }
> if (!list_empty(&domain->devices))
> qi_flush_piotlb(iommu, did, PASID_RID2PASID, addr, npages, ih);
> }
> @@ -5695,6 +5702,100 @@ static void intel_iommu_iotlb_sync_map(struct iommu_domain *domain,
> }
> }
>
> +static int intel_enable_pasid_dma(struct device *dev, u32 pasid)
> +{
This seems like completely the wrong kind of op.
At the level of the iommu driver things should be iommu_domain centric
The op should be
int attach_dev_pasid(struct iommu_domain *domain, struct device *dev, ioasid_t pasid)
Where 'dev' purpose is to provide the RID
The iommu_domain passed in should be the 'default domain' ie the table
used for on-demand mapping, or the passthrough page table.
> + struct intel_iommu *iommu = device_to_iommu(dev, NULL, NULL);
> + struct device_domain_info *info;
I don't even want to know why an iommu driver is tracking its own
per-device state. That seems like completely wrong layering.
Jason
next prev parent reply other threads:[~2021-12-08 13:23 UTC|newest]
Thread overview: 46+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-12-07 13:47 [PATCH 0/4] Enable PASID for DMA API users Jacob Pan
2021-12-07 13:47 ` [PATCH 1/4] ioasid: Reserve a global PASID for in-kernel DMA Jacob Pan
2021-12-09 11:03 ` Jean-Philippe Brucker
2021-12-09 18:14 ` Jacob Pan
2021-12-10 9:06 ` Jean-Philippe Brucker
2021-12-10 12:31 ` Jason Gunthorpe
2021-12-10 18:05 ` Jacob Pan
2021-12-11 8:39 ` Tian, Kevin
2021-12-12 23:34 ` Jason Gunthorpe
2021-12-07 13:47 ` [PATCH 2/4] iommu: Add PASID support for DMA mapping API users Jacob Pan
2021-12-08 2:31 ` Lu Baolu
2021-12-08 18:49 ` Jacob Pan
2021-12-09 1:56 ` Tian, Kevin
2021-12-09 2:21 ` Lu Baolu
2021-12-09 16:32 ` Jacob Pan
2021-12-09 16:57 ` Raj, Ashok
2021-12-09 17:34 ` Jacob Pan
2021-12-07 13:47 ` [PATCH 3/4] iommu/vt-d: Support PASID DMA for in-kernel usage Jacob Pan
2021-12-08 13:22 ` Jason Gunthorpe [this message]
2021-12-08 19:16 ` Jacob Pan
2021-12-09 2:32 ` Lu Baolu
2021-12-09 23:21 ` Jacob Pan
2021-12-09 23:41 ` Jason Gunthorpe
2021-12-10 6:46 ` Lu Baolu
2021-12-10 17:50 ` Jacob Pan
2021-12-10 17:48 ` Jason Gunthorpe
2021-12-10 18:18 ` Jacob Pan
2021-12-10 18:53 ` Jason Gunthorpe
2021-12-07 13:47 ` [PATCH 4/4] dmaengine: idxd: Use DMA API for in-kernel DMA with PASID Jacob Pan
2021-12-07 23:27 ` Dave Jiang
2021-12-08 4:56 ` Vinod Koul
2021-12-08 17:36 ` Jacob Pan
2021-12-08 13:13 ` Jason Gunthorpe
2021-12-08 15:35 ` Dave Jiang
2021-12-08 17:51 ` Jason Gunthorpe
2021-12-09 1:48 ` Tian, Kevin
2021-12-09 19:18 ` Jacob Pan
2021-12-08 19:55 ` Jacob Pan
2021-12-08 20:30 ` Jason Gunthorpe
2021-12-08 21:59 ` Jacob Pan
2021-12-08 23:39 ` Jason Gunthorpe
2021-12-09 0:12 ` Dave Jiang
2021-12-09 2:06 ` Tian, Kevin
2021-12-08 18:37 ` kernel test robot
2021-12-08 13:10 ` [PATCH 0/4] Enable PASID for DMA API users Jason Gunthorpe
2021-12-08 18:15 ` Jacob Pan
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