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Thu, 9 Dec 2021 09:07:06 -0800 From: Sumit Gupta To: , , , , , CC: , , , Subject: [Patch v1 5/8] dt-bindings: arm: tegra: Add NVIDIA Tegra234 CBB2.0 binding Date: Thu, 9 Dec 2021 22:37:04 +0530 Message-ID: <20211209170704.17344-1-sumitg@nvidia.com> X-Mailer: git-send-email 2.17.1 X-NVConfidentiality: public MIME-Version: 1.0 Content-Type: text/plain X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 4b496215-1683-4bcb-415a-08d9bb36582e X-MS-TrafficTypeDiagnostic: CY4PR1201MB2519:EE_ X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:6790; X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 2NB1wsb+5yT8uI60SyvEjU63pTug9+xc+UfyvbpterLAj+0DX7a5OhVi41FPn+/GBSeeXZjM45IuOwSH5ovmAuUpZDunCefxxyNPfWFlIHM9ecgFV0taO7Iw6y5HtxlpZldGUi4oLNH3BWqeb9IgQNL1BC8+CcKQL8VEN2mBPnaPUZppMZdB+3jXzhTz5fJyCGOAwgnC9APWwWCjQWClHSAeIEc46DNZFSjbSH0ubqMaLDlm76+yjj+x/2/mpLkMfZf0yOlrCwT38WEjOCvN56c/5l2UFgCIxT/uqAAR8dBXjoLERAUxzTlFic5MvGS6vGzn8EYBosvFuxiemwDBOQHKF3ynjN2oAzq71dHhqZ5Yiy6ut4uB8uzPSJNWsNRpBpoUzG+Gfl+yUMf96xc0UgKYthNMsRwNyljhRwELMPq+WTM25ho+vsT1j3EOCe4YM+leRX6KhnM32lOIpejHCv7RMGeAN2SZ9yNEPGq48+uJqZ0Xop7+M5LaeewFmamb/L1KmfGhI4MgouLhWs9itUWjkIbLccEyFkbhvIm0Z9kUmWm5z3KJG2Jhoe72eM58ujK12uKr870AZRJJbv+YW6iT5fT4Fm/2FfZ/+eG5Pwef4GSV3uC/ptCVhmujifXvUcLRYpxkclkF1Y3IZPrcU9/mcJ8wKjoqLKMuvXFq0/VW4r3Xu/6HAPMmPKhwlTOi5bxoenf9GObYR5Gf1GFBa1pEj9Bd3rSZxLZ2hjblauijCesFRcxrT7X0x0NwT89Fg41DJtpvfL2FQCs/SfIV2xgn18e/gjMYRp//ZpLQ7MjKbRivnrQGSlSMXGsteeyh/Q7dSEmb/zJqVEadIuvuGeL73wMTkL6mJ1rhU4orII6AUVekJMrvrh3CA/HwooLtzfUxs57aHtzMxu4ktOulBeBs+Uc/JsAOpvdcKi5jH/0= X-Forefront-Antispam-Report: CIP:203.18.50.14;CTRY:HK;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:hkhybrid03.nvidia.com;CAT:NONE;SFS:(4636009)(46966006)(36840700001)(40470700001)(316002)(110136005)(8936002)(107886003)(7636003)(70206006)(508600001)(5660300002)(4326008)(70586007)(54906003)(36860700001)(2906002)(1076003)(82310400004)(8676002)(34020700004)(83380400001)(36756003)(47076005)(26005)(7696005)(356005)(336012)(186003)(86362001)(426003)(40460700001)(2616005);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 Dec 2021 17:07:12.8253 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 4b496215-1683-4bcb-415a-08d9bb36582e X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[203.18.50.14];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT044.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY4PR1201MB2519 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add device-tree binding documentation to represent CBB2.0 (Control Backbone) error handling driver. The driver prints debug information about failed transaction on receiving interrupt from CBB2.0. Signed-off-by: Sumit Gupta --- .../arm/tegra/nvidia,tegra234-cbb.yaml | 80 +++++++++++++++++++ 1 file changed, 80 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/tegra/nvidia,tegra234-cbb.yaml diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra234-cbb.yaml b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra234-cbb.yaml new file mode 100644 index 000000000000..ad8177255e6c --- /dev/null +++ b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra234-cbb.yaml @@ -0,0 +1,80 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- + +$id: "http://devicetree.org/schemas/arm/tegra/tegra23_cbb.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: NVIDIA Tegra CBB2.0 Error handling driver device tree bindings + +maintainers: + - Sumit Gupta + +description: |+ + Control Backbone (CBB) comprises of the physical path from an + initiator to a target's register configuration space. + CBB2.0 consists of multiple sub-blocks connected to each other + to create a topology. + Tegra234 SOC has different fabrics based on CBB2.0 architecture + which include cluster fabrics BPMP, AON, PSC, SCE, RCE, DCE, FSI + and "CBB central fabric". + + In CBB2.0, each initiator which can issue transactions connects to + a Root Master Node (MN) before it connects to any other element of + the fabric. Each Root MN contains a Error Monitor (EM) which detects + and logs error. Interrupts from various EM blocks are collated by + Error Notifier (EN) which is per fabric and presents a single + interrupt from fabric to the SOC interrupt controller. + + The driver handles errors from CBB due to illegal register accesses + and prints debug information about failed transaction on receiving + the interrupt from EN. Debug information includes Error Code, Error + Description, MasterID, Fabric, SlaveID, Address, Cache, Protection, + Security Group etc on receiving error notification. + + If the Error Response Disable (ERD) is set/enabled for an initiator, + then SError or Data abort exception error response is masked and an + interrupt is used for reporting errors due to illegal accesses from + that initiator. The value returned on read failures is '0xFFFFFFFF' + for compatibility with PCIE. + +properties: + $nodename: + pattern: "^[a-f]+-en@[0-9a-f]+$" + + compatible: + enum: + - nvidia,tegra234-aon-fabric + - nvidia,tegra234-bpmp-fabric + - nvidia,tegra234-cbb-fabric + - nvidia,tegra234-dce-fabric + - nvidia,tegra234-rce-fabric + - nvidia,tegra234-sce-fabric + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + items: + - description: secure interrupt from error notifier. + + nvidia,err-notifier-base: + description: address of error notifier inside a fabric. + + nvidia,off-mask-erd: + description: offset of register having ERD bit. + +additionalProperties: true + +examples: + - | + cbb-fabric@1300000 { + compatible = "nvidia,tegra234-cbb-fabric"; + reg = <0x13a00000 0x400000>; + interrupts = ; + nvidia,err-notifier-base = <0 0x60000>; + nvidia,off-mask-erd = <0 0x3a004>; + status = "okay"; + }; +... -- 2.17.1