From: Stephane Eranian <eranian@google.com>
To: linux-kernel@vger.kernel.org
Cc: peterz@infradead.org, kim.phillips@amd.com, acme@redhat.com,
jolsa@redhat.com, songliubraving@fb.com, mpe@ellerman.id.au,
maddy@linux.ibm.com
Subject: [PATCH v4 01/14] perf/core: add perf_clear_branch_entry_bitfields() helper
Date: Fri, 10 Dec 2021 13:02:16 -0800 [thread overview]
Message-ID: <20211210210229.2991238-2-eranian@google.com> (raw)
In-Reply-To: <20211210210229.2991238-1-eranian@google.com>
To make it simpler to reset all the info fields on the
perf_branch_entry, this patch adds a helper inline function.
The goal is to centralize the initialization to avoid missing
a field in case more are added.
Signed-off-by: Stephane Eranian <eranian@google.com>
---
arch/x86/events/intel/lbr.c | 36 +++++++++++++++++-------------------
include/linux/perf_event.h | 16 ++++++++++++++++
2 files changed, 33 insertions(+), 19 deletions(-)
diff --git a/arch/x86/events/intel/lbr.c b/arch/x86/events/intel/lbr.c
index 8043213b75a5..96f1b10a855f 100644
--- a/arch/x86/events/intel/lbr.c
+++ b/arch/x86/events/intel/lbr.c
@@ -778,6 +778,7 @@ void intel_pmu_lbr_disable_all(void)
void intel_pmu_lbr_read_32(struct cpu_hw_events *cpuc)
{
unsigned long mask = x86_pmu.lbr_nr - 1;
+ struct perf_branch_entry *br = cpuc->lbr_entries;
u64 tos = intel_pmu_lbr_tos();
int i;
@@ -793,15 +794,11 @@ void intel_pmu_lbr_read_32(struct cpu_hw_events *cpuc)
rdmsrl(x86_pmu.lbr_from + lbr_idx, msr_lastbranch.lbr);
- cpuc->lbr_entries[i].from = msr_lastbranch.from;
- cpuc->lbr_entries[i].to = msr_lastbranch.to;
- cpuc->lbr_entries[i].mispred = 0;
- cpuc->lbr_entries[i].predicted = 0;
- cpuc->lbr_entries[i].in_tx = 0;
- cpuc->lbr_entries[i].abort = 0;
- cpuc->lbr_entries[i].cycles = 0;
- cpuc->lbr_entries[i].type = 0;
- cpuc->lbr_entries[i].reserved = 0;
+ perf_clear_branch_entry_bitfields(br);
+
+ br->from = msr_lastbranch.from;
+ br->to = msr_lastbranch.to;
+ br++;
}
cpuc->lbr_stack.nr = i;
cpuc->lbr_stack.hw_idx = tos;
@@ -816,6 +813,7 @@ void intel_pmu_lbr_read_64(struct cpu_hw_events *cpuc)
{
bool need_info = false, call_stack = false;
unsigned long mask = x86_pmu.lbr_nr - 1;
+ struct perf_branch_entry *br = cpuc->lbr_entries;
int lbr_format = x86_pmu.intel_cap.lbr_format;
u64 tos = intel_pmu_lbr_tos();
int i;
@@ -888,15 +886,14 @@ void intel_pmu_lbr_read_64(struct cpu_hw_events *cpuc)
if (abort && x86_pmu.lbr_double_abort && out > 0)
out--;
- cpuc->lbr_entries[out].from = from;
- cpuc->lbr_entries[out].to = to;
- cpuc->lbr_entries[out].mispred = mis;
- cpuc->lbr_entries[out].predicted = pred;
- cpuc->lbr_entries[out].in_tx = in_tx;
- cpuc->lbr_entries[out].abort = abort;
- cpuc->lbr_entries[out].cycles = cycles;
- cpuc->lbr_entries[out].type = 0;
- cpuc->lbr_entries[out].reserved = 0;
+ perf_clear_branch_entry_bitfields(br+out);
+ br[out].from = from;
+ br[out].to = to;
+ br[out].mispred = mis;
+ br[out].predicted = pred;
+ br[out].in_tx = in_tx;
+ br[out].abort = abort;
+ br[out].cycles = cycles;
out++;
}
cpuc->lbr_stack.nr = out;
@@ -958,6 +955,8 @@ static void intel_pmu_store_lbr(struct cpu_hw_events *cpuc,
to = rdlbr_to(i, lbr);
info = rdlbr_info(i, lbr);
+ perf_clear_branch_entry_bitfields(e);
+
e->from = from;
e->to = to;
e->mispred = get_lbr_mispred(info);
@@ -966,7 +965,6 @@ static void intel_pmu_store_lbr(struct cpu_hw_events *cpuc,
e->abort = !!(info & LBR_INFO_ABORT);
e->cycles = get_lbr_cycles(info);
e->type = get_lbr_br_type(info);
- e->reserved = 0;
}
cpuc->lbr_stack.nr = i;
diff --git a/include/linux/perf_event.h b/include/linux/perf_event.h
index 7b7525e9155f..bbe02c80244b 100644
--- a/include/linux/perf_event.h
+++ b/include/linux/perf_event.h
@@ -1061,6 +1061,22 @@ static inline void perf_sample_data_init(struct perf_sample_data *data,
data->txn = 0;
}
+/*
+ * Clear all bitfields in the perf_branch_entry.
+ * The to and from fields are not cleared because they are
+ * systematically modified by caller.
+ */
+static inline void perf_clear_branch_entry_bitfields(struct perf_branch_entry *br)
+{
+ br->mispred = 0;
+ br->predicted = 0;
+ br->in_tx = 0;
+ br->abort = 0;
+ br->cycles = 0;
+ br->type = 0;
+ br->reserved = 0;
+}
+
extern void perf_output_sample(struct perf_output_handle *handle,
struct perf_event_header *header,
struct perf_sample_data *data,
--
2.34.1.173.g76aa8bc2d0-goog
next prev parent reply other threads:[~2021-12-10 21:02 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-12-10 21:02 [PATCH v4 00/14] perf/x86/amd: Add AMD Fam19h Branch Sampling support Stephane Eranian
2021-12-10 21:02 ` Stephane Eranian [this message]
2021-12-10 21:02 ` [PATCH v4 02/14] x86/cpufeatures: add AMD Fam19h Branch Sampling feature Stephane Eranian
2021-12-10 21:21 ` Borislav Petkov
2021-12-10 21:25 ` Stephane Eranian
2021-12-10 21:02 ` [PATCH v4 03/14] perf/x86/amd: add AMD Fam19h Branch Sampling support Stephane Eranian
2021-12-29 9:54 ` Like Xu
2022-01-03 23:24 ` Stephane Eranian
2021-12-10 21:02 ` [PATCH v4 04/14] perf/x86/amd: add branch-brs helper event for Fam19h BRS Stephane Eranian
2021-12-10 21:02 ` [PATCH v4 05/14] perf/x86/amd: enable branch sampling priv level filtering Stephane Eranian
2021-12-10 21:02 ` [PATCH v4 06/14] perf/x86/amd: add AMD branch sampling period adjustment Stephane Eranian
2021-12-10 21:02 ` [PATCH v4 07/14] perf/x86/amd: make Zen3 branch sampling opt-in Stephane Eranian
2021-12-10 21:02 ` [PATCH v4 08/14] ACPI: add perf low power callback Stephane Eranian
2021-12-13 5:56 ` kernel test robot
2021-12-13 22:40 ` kernel test robot
2021-12-23 13:11 ` Like Xu
2021-12-10 21:02 ` [PATCH v4 09/14] perf/x86/amd: add idle hooks for branch sampling Stephane Eranian
2021-12-10 21:02 ` [PATCH v4 10/14] perf tools: add branch-brs as a new event Stephane Eranian
2021-12-10 21:02 ` [PATCH v4 11/14] perf evsel: Make evsel__env always return a valid env Stephane Eranian
2021-12-10 21:02 ` [PATCH v4 12/14] perf tools: Improve IBS error handling Stephane Eranian
2021-12-10 21:02 ` [PATCH v4 13/14] perf tools: Improve error handling of AMD Branch Sampling Stephane Eranian
2021-12-10 21:02 ` [PATCH v4 14/14] perf report: add addr_from/addr_to sort dimensions Stephane Eranian
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