From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 91A02C433FE for ; Tue, 14 Dec 2021 22:03:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234614AbhLNWDe (ORCPT ); Tue, 14 Dec 2021 17:03:34 -0500 Received: from mga03.intel.com ([134.134.136.65]:25077 "EHLO mga03.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229975AbhLNWDc (ORCPT ); Tue, 14 Dec 2021 17:03:32 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1639519412; x=1671055412; h=date:from:to:cc:subject:message-id:mime-version; bh=5PmAzK2/sfKUZ2BGAwAHafsf+NzQ82CfvTS31m6HQnA=; b=dCQI9NQnT2e3AR3kkxQR1aGvtqDKw4mB7npukWFriEJM9LUmWlHe2J3w mg5muFJs0Z0lCbZVP0xj4M7jFzS3fzwBB8o9VZHo9mEUtFwXSqwDRkoyb oSYYJ/jJuSPkLFblw63sfMacVmmN9Nm1RHltqaz5aeB07sM3BBFrssYM7 x0gYDzbTVOPCGdk2in+DjhPSVCwHVm38p3OpMy7eL8E48MoWkeOtgBuhZ 88RAsONn73qepOd85D61XXjOyczGtwhk+AuQdN/MTaATxKxqobyoXatZG VEfQK2JWyTVso4IWlKDtTKIbbG0q53kDtoV8h2hGMwf2jv4Q5KyFuBZdz A==; X-IronPort-AV: E=McAfee;i="6200,9189,10197"; a="239042501" X-IronPort-AV: E=Sophos;i="5.88,206,1635231600"; d="scan'208";a="239042501" Received: from orsmga006.jf.intel.com ([10.7.209.51]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Dec 2021 14:03:31 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.88,206,1635231600"; d="scan'208";a="465273457" Received: from lkp-server02.sh.intel.com (HELO 9f38c0981d9f) ([10.239.97.151]) by orsmga006.jf.intel.com with ESMTP; 14 Dec 2021 14:03:30 -0800 Received: from kbuild by 9f38c0981d9f with local (Exim 4.92) (envelope-from ) id 1mxFtR-0000ow-ES; Tue, 14 Dec 2021 22:03:29 +0000 Date: Wed, 15 Dec 2021 06:02:30 +0800 From: kernel test robot To: Atish Patra Cc: llvm@lists.linux.dev, kbuild-all@lists.01.org, linux-kernel@vger.kernel.org, Palmer Dabbelt , linux-doc@vger.kernel.org Subject: [palmer:riscv-pmu 4/10] drivers/perf/riscv_pmu_legacy.c:76: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst Message-ID: <202112150635.JSGg5exu-lkp@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline User-Agent: Mutt/1.10.1 (2018-07-13) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org tree: https://git.kernel.org/pub/scm/linux/kernel/git/palmer/linux.git riscv-pmu head: 7a94c6fb363cfe62906cb0503d763204b0fe32b8 commit: e4d5f33e63b1260f378512c0f6e5a117ed6b894a [4/10] RISC-V: Add a simple platform driver for RISC-V legacy perf config: riscv-randconfig-r026-20211214 (https://download.01.org/0day-ci/archive/20211215/202112150635.JSGg5exu-lkp@intel.com/config) compiler: clang version 14.0.0 (https://github.com/llvm/llvm-project b6a2ddb6c8ac29412b1361810972e15221fa021c) reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # install riscv cross compiling tool for clang build # apt-get install binutils-riscv64-linux-gnu # https://git.kernel.org/pub/scm/linux/kernel/git/palmer/linux.git/commit/?id=e4d5f33e63b1260f378512c0f6e5a117ed6b894a git remote add palmer https://git.kernel.org/pub/scm/linux/kernel/git/palmer/linux.git git fetch --no-tags palmer riscv-pmu git checkout e4d5f33e63b1260f378512c0f6e5a117ed6b894a # save the config file to linux build tree mkdir build_dir COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 O=build_dir ARCH=riscv SHELL=/bin/bash drivers/misc/ drivers/perf/ drivers/power/supply/ If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot All warnings (new ones prefixed by >>): >> drivers/perf/riscv_pmu_legacy.c:76: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst * This is just a simple implementation to allow legacy implementations vim +76 drivers/perf/riscv_pmu_legacy.c 74 75 /** > 76 * This is just a simple implementation to allow legacy implementations 77 * compatible with new RISC-V PMU driver framework. 78 * This driver only allows reading two counters i.e CYCLE & INSTRET. 79 * However, it can not start or stop the counter. Thus, it is not very useful 80 * will be removed in future. 81 */ 82 static void pmu_legacy_init(struct riscv_pmu *pmu) 83 { 84 pr_info("Legacy PMU implementation is available\n"); 85 86 pmu->num_counters = RISCV_PMU_LEGACY_NUM_CTR; 87 pmu->ctr_start = pmu_legacy_ctr_start; 88 pmu->ctr_stop = NULL; 89 pmu->event_map = pmu_legacy_event_map; 90 pmu->ctr_get_idx = pmu_legacy_ctr_get_idx; 91 pmu->ctr_get_width = NULL; 92 pmu->ctr_clear_idx = NULL; 93 pmu->ctr_read = pmu_legacy_read_ctr; 94 95 perf_pmu_register(&pmu->pmu, "cpu", PERF_TYPE_RAW); 96 } 97 --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org