From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
To: "Rafael J. Wysocki" <rafael.j.wysocki@intel.com>,
linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org
Cc: "Rafael J. Wysocki" <rafael@kernel.org>,
Len Brown <lenb@kernel.org>,
Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Subject: [PATCH v1 1/1] ACPI: CPPC: Amend documentation in the comments
Date: Wed, 22 Dec 2021 16:04:45 +0200 [thread overview]
Message-ID: <20211222140445.69689-1-andriy.shevchenko@linux.intel.com> (raw)
Currently it's too hard to read the _CPC structure as it's commented.
Reshuffle indentation and style to make it readable.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
---
drivers/acpi/cppc_acpi.c | 59 ++++++++++++++--------------------------
1 file changed, 21 insertions(+), 38 deletions(-)
diff --git a/drivers/acpi/cppc_acpi.c b/drivers/acpi/cppc_acpi.c
index b62c87b8ce4a..182471f319fe 100644
--- a/drivers/acpi/cppc_acpi.c
+++ b/drivers/acpi/cppc_acpi.c
@@ -604,47 +604,30 @@ static bool is_cppc_supported(int revision, int num_ent)
/*
* An example CPC table looks like the following.
*
- * Name(_CPC, Package()
- * {
- * 17,
- * NumEntries
- * 1,
- * // Revision
- * ResourceTemplate(){Register(PCC, 32, 0, 0x120, 2)},
- * // Highest Performance
- * ResourceTemplate(){Register(PCC, 32, 0, 0x124, 2)},
- * // Nominal Performance
- * ResourceTemplate(){Register(PCC, 32, 0, 0x128, 2)},
- * // Lowest Nonlinear Performance
- * ResourceTemplate(){Register(PCC, 32, 0, 0x12C, 2)},
- * // Lowest Performance
- * ResourceTemplate(){Register(PCC, 32, 0, 0x130, 2)},
- * // Guaranteed Performance Register
- * ResourceTemplate(){Register(PCC, 32, 0, 0x110, 2)},
- * // Desired Performance Register
- * ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)},
- * ..
- * ..
- * ..
- *
- * }
+ * Name (_CPC, Package() {
+ * 17, // NumEntries
+ * 1, // Revision
+ * ResourceTemplate() {Register(PCC, 32, 0, 0x120, 2)}, // Highest Performance
+ * ResourceTemplate() {Register(PCC, 32, 0, 0x124, 2)}, // Nominal Performance
+ * ResourceTemplate() {Register(PCC, 32, 0, 0x128, 2)}, // Lowest Nonlinear Performance
+ * ResourceTemplate() {Register(PCC, 32, 0, 0x12C, 2)}, // Lowest Performance
+ * ResourceTemplate() {Register(PCC, 32, 0, 0x130, 2)}, // Guaranteed Performance Register
+ * ResourceTemplate() {Register(PCC, 32, 0, 0x110, 2)}, // Desired Performance Register
+ * ResourceTemplate() {Register(SystemMemory, 0, 0, 0, 0)},
+ * ...
+ * ...
+ * ...
+ * }
* Each Register() encodes how to access that specific register.
* e.g. a sample PCC entry has the following encoding:
*
- * Register (
- * PCC,
- * AddressSpaceKeyword
- * 8,
- * //RegisterBitWidth
- * 8,
- * //RegisterBitOffset
- * 0x30,
- * //RegisterAddress
- * 9
- * //AccessSize (subspace ID)
- * 0
- * )
- * }
+ * Register (
+ * PCC, // AddressSpaceKeyword
+ * 8, // RegisterBitWidth
+ * 8, // RegisterBitOffset
+ * 0x30, // RegisterAddress
+ * 9, // AccessSize (subspace ID)
+ * )
*/
#ifndef init_freq_invariance_cppc
--
2.34.1
reply other threads:[~2021-12-22 14:05 UTC|newest]
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