From: Miquel Raynal <miquel.raynal@bootlin.com>
To: Roger Quadros <rogerq@kernel.org>
Cc: krzysztof.kozlowski@canonical.com, tony@atomide.com,
robh@kernel.org, kishon@ti.com, nm@ti.com, vigneshr@ti.com,
linux-mtd@lists.infradead.org, linux-omap@vger.kernel.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org
Subject: Re: [PATCH v4 3/4] memory: omap-gpmc: Use a compatible match table when checking for NAND controller
Date: Wed, 22 Dec 2021 15:18:23 +0100 [thread overview]
Message-ID: <20211222151823.77179b74@xps13> (raw)
In-Reply-To: <51b8e895-95e1-0024-1457-ec534985c9f0@kernel.org>
Hi Roger,
rogerq@kernel.org wrote on Tue, 21 Dec 2021 22:01:28 +0200:
> Hi Miquel,
>
> On 21/12/2021 15:17, Roger Quadros wrote:
> > As more compatibles can be added to the GPMC NAND controller driver
> > use a compatible match table.
> >
> > Cc: Miquel Raynal <miquel.raynal@bootlin.com>
> > Signed-off-by: Roger Quadros <rogerq@kernel.org>
> > ---
> > drivers/memory/omap-gpmc.c | 6 +++++-
> > drivers/mtd/nand/raw/omap2.c | 5 +----
>
> Will need your Ack for this one as well. Thanks :)
>
>
> > include/linux/platform_data/mtd-nand-omap2.h | 9 ++++++++-
> > 3 files changed, 14 insertions(+), 6 deletions(-)
>
> cheers,
> -roger
>
> >
> > diff --git a/drivers/memory/omap-gpmc.c b/drivers/memory/omap-gpmc.c
> > index 624153048182..d19ffc895e5b 100644
> > --- a/drivers/memory/omap-gpmc.c
> > +++ b/drivers/memory/omap-gpmc.c
> > @@ -2091,6 +2091,7 @@ static int gpmc_probe_generic_child(struct platform_device *pdev,
> > u32 val;
> > struct gpio_desc *waitpin_desc = NULL;
> > struct gpmc_device *gpmc = platform_get_drvdata(pdev);
> > + bool is_nand = false;
> >
> > if (of_property_read_u32(child, "reg", &cs) < 0) {
> > dev_err(&pdev->dev, "%pOF has no 'reg' property\n",
> > @@ -2183,7 +2184,10 @@ static int gpmc_probe_generic_child(struct platform_device *pdev,
> > }
> > }
> >
> > - if (of_device_is_compatible(child, "ti,omap2-nand")) {
> > + if (of_match_node(omap_nand_ids, child))
> > + is_nand = true;
> > +
> > + if (is_nand) {
nitpick: why this intermediate variable?
Otherwise for the NAND bits:
Acked-by: Miquel Raynal <miquel.raynal@bootlin.com>
> > /* NAND specific setup */
> > val = 8;
> > of_property_read_u32(child, "nand-bus-width", &val);
> > diff --git a/drivers/mtd/nand/raw/omap2.c b/drivers/mtd/nand/raw/omap2.c
> > index b26d4947af02..e6dd8b4cf0d2 100644
> > --- a/drivers/mtd/nand/raw/omap2.c
> > +++ b/drivers/mtd/nand/raw/omap2.c
> > @@ -2352,10 +2352,7 @@ static int omap_nand_remove(struct platform_device *pdev)
> > return ret;
> > }
> >
> > -static const struct of_device_id omap_nand_ids[] = {
> > - { .compatible = "ti,omap2-nand", },
> > - {},
> > -};
> > +/* omap_nand_ids defined in linux/platform_data/mtd-nand-omap2.h */
> > MODULE_DEVICE_TABLE(of, omap_nand_ids);
> >
> > static struct platform_driver omap_nand_driver = {
> > diff --git a/include/linux/platform_data/mtd-nand-omap2.h b/include/linux/platform_data/mtd-nand-omap2.h
> > index de6ada739121..92f011805ad4 100644
> > --- a/include/linux/platform_data/mtd-nand-omap2.h
> > +++ b/include/linux/platform_data/mtd-nand-omap2.h
> > @@ -7,6 +7,7 @@
> > #define _MTD_NAND_OMAP2_H
> >
> > #include <linux/mtd/partitions.h>
> > +#include <linux/mod_devicetable.h>
> >
> > #define GPMC_BCH_NUM_REMAINDER 8
> >
> > @@ -61,4 +62,10 @@ struct gpmc_nand_regs {
> > void __iomem *gpmc_bch_result5[GPMC_BCH_NUM_REMAINDER];
> > void __iomem *gpmc_bch_result6[GPMC_BCH_NUM_REMAINDER];
> > };
> > -#endif
> > +
> > +static const struct of_device_id omap_nand_ids[] = {
> > + { .compatible = "ti,omap2-nand", },
> > + {},
> > +};
> > +
> > +#endif /* _MTD_NAND_OMAP2_H */
> >
Thanks,
Miquèl
next prev parent reply other threads:[~2021-12-22 14:18 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-12-21 13:17 [PATCH v4 0/4] memory: omap-gpmc: Add AM64 SoC support Roger Quadros
2021-12-21 13:17 ` [PATCH v4 1/4] dt-bindings: memory-controllers: ti,gpmc: Add compatible for AM64 Roger Quadros
2021-12-21 13:17 ` [PATCH v4 2/4] memory: omap-gpmc: Add support for GPMC on AM64 SoC Roger Quadros
2021-12-21 13:17 ` [PATCH v4 3/4] memory: omap-gpmc: Use a compatible match table when checking for NAND controller Roger Quadros
2021-12-21 20:01 ` Roger Quadros
2021-12-22 14:18 ` Miquel Raynal [this message]
2021-12-22 15:49 ` Krzysztof Kozlowski
2021-12-22 17:04 ` Roger Quadros
2021-12-21 13:17 ` [PATCH v4 4/4] mtd: rawnand: omap2: Select GPMC device driver for ARCH_K3 Roger Quadros
2021-12-21 13:49 ` Miquel Raynal
2021-12-22 11:50 ` Krzysztof Kozlowski
2021-12-22 14:19 ` Miquel Raynal
2021-12-22 15:52 ` [PATCH v4 0/4] memory: omap-gpmc: Add AM64 SoC support Krzysztof Kozlowski
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20211222151823.77179b74@xps13 \
--to=miquel.raynal@bootlin.com \
--cc=devicetree@vger.kernel.org \
--cc=kishon@ti.com \
--cc=krzysztof.kozlowski@canonical.com \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-mtd@lists.infradead.org \
--cc=linux-omap@vger.kernel.org \
--cc=nm@ti.com \
--cc=robh@kernel.org \
--cc=rogerq@kernel.org \
--cc=tony@atomide.com \
--cc=vigneshr@ti.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox