Re: [PATCH 2/2] ARM: mediatek: dts: activate SMP for mt6582

Matthias Brugger
2021-12-31T15:51:26Z

On 12/30/21 16:51, Maxim Kutnij wrote:
> This patch adds nodes mt6589-smp, pmu and arm,armv7-timer.
>
> Signed-off-by: Maxim Kutnij <gtk3@inbox.ru>
> ---
> arch/arm/boot/dts/mt6582.dtsi | 35 ++++++++++++++++++++++++++++++-----
> 1 file changed, 30 insertions(+), 5 deletions(-)
>
> diff --git a/arch/arm/boot/dts/mt6582.dtsi b/arch/arm/boot/dts/mt6582.dtsi
> index 4263371784c..5efcbf43325 100644
> --- a/arch/arm/boot/dts/mt6582.dtsi
> +++ b/arch/arm/boot/dts/mt6582.dtsi
> @@ -15,29 +15,43 @@ / {
> cpus {
> #address-cells = <1>;
> #size-cells = <0>;
> + enable-method = "mediatek,mt6589-smp";
>
> - cpu@0 {
> + cpu0: cpu@0 {
> device_type = "cpu";
> compatible = "arm,cortex-a7";
> reg = <0x0>;
> + clock-frequency = <1300000000>;

What do we need the clock-frequency for? I wasn't able to figure that
out right now.

Other then that patches look good.

Regards,
Matthias

> };
> - cpu@1 {
> + cpu1: cpu@1 {
> device_type = "cpu";
> compatible = "arm,cortex-a7";
> reg = <0x1>;
> + clock-frequency = <1300000000>;
> };
> - cpu@2 {
> + cpu2: cpu@2 {
> device_type = "cpu";
> compatible = "arm,cortex-a7";
> reg = <0x2>;
> + clock-frequency = <1300000000>;
> };
> - cpu@3 {
> + cpu3: cpu@3 {
> device_type = "cpu";
> compatible = "arm,cortex-a7";
> reg = <0x3>;
> + clock-frequency = <1300000000>;
> };
> };
>
> + pmu {
> + compatible = "arm,cortex-a7-pmu";
> + interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_LOW>,
> + <GIC_SPI 5 IRQ_TYPE_LEVEL_LOW>,
> + <GIC_SPI 6 IRQ_TYPE_LEVEL_LOW>,
> + <GIC_SPI 7 IRQ_TYPE_LEVEL_LOW>;
> + interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
> + };
> +
> system_clk: dummy13m {
> compatible = "fixed-clock";
> clock-frequency = <13000000>;
> @@ -56,7 +70,18 @@ uart_clk: dummy26m {
> #clock-cells = <0>;
> };
>
> - timer: timer@11008000 {
> + timer {
> + compatible = "arm,armv7-timer";
> + interrupt-parent = <&gic>;
> + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
> + <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
> + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
> + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
> + clock-frequency = <13000000>;
> + arm,cpu-registers-not-fw-configured;
> + };
> +
> + timer: timer@10008000 {
> compatible = "mediatek,mt6577-timer";
> reg = <0x10008000 0x80>;
> interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_LOW>;