Re: [PATCH V5 12/21] riscv: compat: syscall: Add entry.S implementation

Palmer Dabbelt
2022-02-23T01:42:58Z

On Tue, 01 Feb 2022 07:05:36 PST (-0800), guoren@kernel.org wrote:
> From: Guo Ren <guoren@linux.alibaba.com>
>
> Implement the entry of compat_sys_call_table[] in asm. Ref to
> riscv-privileged spec 4.1.1 Supervisor Status Register (sstatus):
>
> BIT[32:33] = UXL[1:0]:
> - 1:32
> - 2:64
> - 3:128
>
> Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
> Signed-off-by: Guo Ren <guoren@kernel.org>
> Cc: Arnd Bergmann <arnd@arndb.de>
> Cc: Palmer Dabbelt <palmer@dabbelt.com>
> ---
> arch/riscv/include/asm/csr.h | 7 +++++++
> arch/riscv/kernel/entry.S | 18 ++++++++++++++++--
> 2 files changed, 23 insertions(+), 2 deletions(-)
>
> diff --git a/arch/riscv/include/asm/csr.h b/arch/riscv/include/asm/csr.h
> index ae711692eec9..eed96fa62d66 100644
> --- a/arch/riscv/include/asm/csr.h
> +++ b/arch/riscv/include/asm/csr.h
> @@ -36,6 +36,13 @@
> #define SR_SD _AC(0x8000000000000000, UL) /* FS/XS dirty */
> #endif
>
> +#ifdef CONFIG_COMPAT
> +#define SR_UXL _AC(0x300000000, UL) /* XLEN mask for U-mode */
> +#define SR_UXL_32 _AC(0x100000000, UL) /* XLEN = 32 for U-mode */
> +#define SR_UXL_64 _AC(0x200000000, UL) /* XLEN = 64 for U-mode */
> +#define SR_UXL_SHIFT 32
> +#endif
> +
> /* SATP flags */
> #ifndef CONFIG_64BIT
> #define SATP_PPN _AC(0x003FFFFF, UL)
> diff --git a/arch/riscv/kernel/entry.S b/arch/riscv/kernel/entry.S
> index ed29e9c8f660..1951743f09b3 100644
> --- a/arch/riscv/kernel/entry.S
> +++ b/arch/riscv/kernel/entry.S
> @@ -207,13 +207,27 @@ check_syscall_nr:
> * Syscall number held in a7.
> * If syscall number is above allowed value, redirect to ni_syscall.
> */
> - bgeu a7, t0, 1f
> + bgeu a7, t0, 3f
> +#ifdef CONFIG_COMPAT
> + REG_L s0, PT_STATUS(sp)
> + srli s0, s0, SR_UXL_SHIFT
> + andi s0, s0, (SR_UXL >> SR_UXL_SHIFT)
> + li t0, (SR_UXL_32 >> SR_UXL_SHIFT)
> + sub t0, s0, t0
> + bnez t0, 1f
> +
> + /* Call compat_syscall */
> + la s0, compat_sys_call_table
> + j 2f
> +1:
> +#endif
> /* Call syscall */
> la s0, sys_call_table
> +2:
> slli t0, a7, RISCV_LGPTR
> add s0, s0, t0
> REG_L s0, 0(s0)
> -1:
> +3:
> jalr s0
>
> ret_from_syscall:

Reviewed-by: Palmer Dabbelt <palmer@rivosinc.com>