From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 28216C41535 for ; Mon, 7 Feb 2022 05:51:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234983AbiBGFtl (ORCPT ); Mon, 7 Feb 2022 00:49:41 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52574 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S242918AbiBGCwe (ORCPT ); Sun, 6 Feb 2022 21:52:34 -0500 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 19BD1C061A73; Sun, 6 Feb 2022 18:52:31 -0800 (PST) X-UUID: 99c12dbabde24c4f9733a4db35d00fe1-20220207 X-UUID: 99c12dbabde24c4f9733a4db35d00fe1-20220207 Received: from mtkexhb01.mediatek.inc [(172.21.101.102)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 488659191; Mon, 07 Feb 2022 10:47:26 +0800 Received: from mtkcas10.mediatek.inc (172.21.101.39) by mtkmbs10n1.mediatek.inc (172.21.101.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.15; Mon, 7 Feb 2022 10:47:25 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas10.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 7 Feb 2022 10:47:24 +0800 From: Miles Chen To: CC: , , , , , , , , Subject: Re: [PATCH v2 13/31] clk: mediatek: pll: Implement unregister API Date: Mon, 7 Feb 2022 10:47:25 +0800 Message-ID: <20220207024725.14618-1-miles.chen@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20220202134834.690675-14-wenst@chromium.org> References: <20220202134834.690675-14-wenst@chromium.org> MIME-Version: 1.0 Content-Type: text/plain X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > The PLL clk type within the MediaTek clk driver library only has a > register function, and no corresponding unregister function. This > means there is no way for its users to properly implement cleanup > and removal. > > Add a matching unregister function for the PLL type clk. > > Signed-off-by: Chen-Yu Tsai Reviewed-by: Miles Chen > --- > drivers/clk/mediatek/clk-pll.c | 55 ++++++++++++++++++++++++++++++++++ > drivers/clk/mediatek/clk-pll.h | 2 ++ > 2 files changed, 57 insertions(+) > > diff --git a/drivers/clk/mediatek/clk-pll.c b/drivers/clk/mediatek/clk-pll.c > index 64f59554bc9b..b54e33b75d4e 100644 > --- a/drivers/clk/mediatek/clk-pll.c > +++ b/drivers/clk/mediatek/clk-pll.c > @@ -360,6 +360,21 @@ static struct clk *mtk_clk_register_pll(const struct mtk_pll_data *data, > return clk; > } > > +static void mtk_clk_unregister_pll(struct clk *clk) > +{ > + struct clk_hw *hw; > + struct mtk_clk_pll *pll; > + > + hw = __clk_get_hw(clk); > + if (!hw) > + return; > + > + pll = to_mtk_clk_pll(hw); > + > + clk_unregister(clk); > + kfree(pll); > +} > + > void mtk_clk_register_plls(struct device_node *node, > const struct mtk_pll_data *plls, int num_plls, struct clk_onecell_data *clk_data) > { > @@ -388,4 +403,44 @@ void mtk_clk_register_plls(struct device_node *node, > } > EXPORT_SYMBOL_GPL(mtk_clk_register_plls); > > +static __iomem void *mtk_clk_pll_get_base(struct clk *clk, > + const struct mtk_pll_data *data) > +{ > + struct clk_hw *hw = __clk_get_hw(clk); > + struct mtk_clk_pll *pll = to_mtk_clk_pll(hw); > + > + return pll->base_addr - data->reg; > +} > + > +void mtk_clk_unregister_plls(const struct mtk_pll_data *plls, int num_plls, > + struct clk_onecell_data *clk_data) > +{ > + __iomem void *base = NULL; > + int i; > + > + if (!clk_data) > + return; > + > + for (i = num_plls; i > 0; i--) { > + const struct mtk_pll_data *pll = &plls[i - 1]; > + > + if (IS_ERR_OR_NULL(clk_data->clks[pll->id])) > + continue; > + > + /* > + * This is quite ugly but unfortunately the clks don't have > + * any device tied to them, so there's no place to store the > + * pointer to the I/O region base address. We have to fetch > + * it from one of the registered clks. > + */ > + base = mtk_clk_pll_get_base(clk_data->clks[pll->id], pll); > + > + mtk_clk_unregister_pll(clk_data->clks[pll->id]); > + clk_data->clks[pll->id] = ERR_PTR(-ENOENT); > + } > + > + iounmap(base); > +} > +EXPORT_SYMBOL_GPL(mtk_clk_unregister_plls); > + > MODULE_LICENSE("GPL"); > diff --git a/drivers/clk/mediatek/clk-pll.h b/drivers/clk/mediatek/clk-pll.h > index d01b0c38311d..a889b1e472e7 100644 > --- a/drivers/clk/mediatek/clk-pll.h > +++ b/drivers/clk/mediatek/clk-pll.h > @@ -51,5 +51,7 @@ struct mtk_pll_data { > void mtk_clk_register_plls(struct device_node *node, > const struct mtk_pll_data *plls, int num_plls, > struct clk_onecell_data *clk_data); > +void mtk_clk_unregister_plls(const struct mtk_pll_data *plls, int num_plls, > + struct clk_onecell_data *clk_data); > > #endif /* __DRV_CLK_MTK_PLL_H */ > -- > 2.35.0.rc2.247.g8bbb082509-goog > >