From: Lu Baolu <baolu.lu@linux.intel.com>
To: Joerg Roedel <joro@8bytes.org>, Kevin Tian <kevin.tian@intel.com>,
Ashok Raj <ashok.raj@intel.com>, Liu Yi L <yi.l.liu@intel.com>,
Jacob Pan <jacob.jun.pan@linux.intel.com>
Cc: Robin Murphy <robin.murphy@arm.com>,
Jason Gunthorpe <jgg@nvidia.com>, Christoph Hellwig <hch@lst.de>,
iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org,
Lu Baolu <baolu.lu@linux.intel.com>
Subject: [PATCH v1 06/10] iommu/vt-d: Remove DEFER_DEVICE_DOMAIN_INFO
Date: Mon, 7 Feb 2022 14:41:38 +0800 [thread overview]
Message-ID: <20220207064142.1092846-7-baolu.lu@linux.intel.com> (raw)
In-Reply-To: <20220207064142.1092846-1-baolu.lu@linux.intel.com>
Allocate and set the per-device iommu private data during iommu device
probe. Add a flag to indicate whether default domain attachment is
deferred. With this refactoring, the dummy DEFER_DEVICE_DOMAIN_INFO
pointer is removed.
Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
---
drivers/iommu/intel/iommu.c | 122 +++++++++++++++---------------------
1 file changed, 51 insertions(+), 71 deletions(-)
diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c
index 185aa38df602..165c890b8304 100644
--- a/drivers/iommu/intel/iommu.c
+++ b/drivers/iommu/intel/iommu.c
@@ -309,19 +309,9 @@ static int iommu_skip_te_disable;
int intel_iommu_gfx_mapped;
EXPORT_SYMBOL_GPL(intel_iommu_gfx_mapped);
-#define DEFER_DEVICE_DOMAIN_INFO ((struct device_domain_info *)(-2))
struct device_domain_info *get_domain_info(struct device *dev)
{
- struct device_domain_info *info;
-
- if (!dev)
- return NULL;
-
- info = dev_iommu_priv_get(dev);
- if (unlikely(info == DEFER_DEVICE_DOMAIN_INFO))
- return NULL;
-
- return info;
+ return dev_iommu_priv_get(dev);
}
DEFINE_SPINLOCK(device_domain_lock);
@@ -708,11 +698,6 @@ struct context_entry *iommu_context_addr(struct intel_iommu *iommu, u8 bus,
return &context[devfn];
}
-static bool attach_deferred(struct device *dev)
-{
- return dev_iommu_priv_get(dev) == DEFER_DEVICE_DOMAIN_INFO;
-}
-
/**
* is_downstream_to_pci_bridge - test if a device belongs to the PCI
* sub-hierarchy of a candidate PCI-PCI bridge
@@ -2426,9 +2411,6 @@ struct dmar_domain *find_domain(struct device *dev)
if (unlikely(!dev || !dev->iommu))
return NULL;
- if (unlikely(attach_deferred(dev)))
- return NULL;
-
/* No lock here, assumes no domain exit in normal case */
info = get_domain_info(dev);
if (likely(info))
@@ -2497,66 +2479,20 @@ static struct dmar_domain *dmar_insert_one_dev_info(struct intel_iommu *iommu,
struct device *dev,
struct dmar_domain *domain)
{
- struct device_domain_info *info;
+ struct device_domain_info *info = get_domain_info(dev);
unsigned long flags;
int ret;
- info = kzalloc(sizeof(*info), GFP_KERNEL);
- if (!info)
- return NULL;
-
- if (!dev_is_real_dma_subdevice(dev)) {
- info->bus = bus;
- info->devfn = devfn;
- info->segment = iommu->segment;
- } else {
- struct pci_dev *pdev = to_pci_dev(dev);
-
- info->bus = pdev->bus->number;
- info->devfn = pdev->devfn;
- info->segment = pci_domain_nr(pdev->bus);
- }
-
- info->dev = dev;
- info->domain = domain;
- info->iommu = iommu;
-
- if (dev && dev_is_pci(dev)) {
- struct pci_dev *pdev = to_pci_dev(info->dev);
-
- if (ecap_dev_iotlb_support(iommu->ecap) &&
- pci_ats_supported(pdev) &&
- dmar_find_matched_atsr_unit(pdev))
- info->ats_supported = 1;
-
- if (sm_supported(iommu)) {
- if (pasid_supported(iommu)) {
- int features = pci_pasid_features(pdev);
- if (features >= 0)
- info->pasid_supported = features | 1;
- }
-
- if (info->ats_supported && ecap_prs(iommu->ecap) &&
- pci_pri_supported(pdev))
- info->pri_supported = 1;
- }
- }
-
spin_lock_irqsave(&device_domain_lock, flags);
+ info->domain = domain;
spin_lock(&iommu->lock);
ret = domain_attach_iommu(domain, iommu);
spin_unlock(&iommu->lock);
-
if (ret) {
spin_unlock_irqrestore(&device_domain_lock, flags);
- kfree(info);
return NULL;
}
-
list_add(&info->link, &domain->devices);
- list_add(&info->global, &device_domain_list);
- if (dev)
- dev_iommu_priv_set(dev, info);
spin_unlock_irqrestore(&device_domain_lock, flags);
/* PASID table is mandatory for a PCI device in scalable mode. */
@@ -4405,14 +4341,56 @@ static bool intel_iommu_capable(enum iommu_cap cap)
static struct iommu_device *intel_iommu_probe_device(struct device *dev)
{
+ struct pci_dev *pdev = dev_is_pci(dev) ? to_pci_dev(dev) : NULL;
+ struct device_domain_info *info;
struct intel_iommu *iommu;
+ unsigned long flags;
+ u8 bus, devfn;
- iommu = device_to_iommu(dev, NULL, NULL);
+ iommu = device_to_iommu(dev, &bus, &devfn);
if (!iommu)
return ERR_PTR(-ENODEV);
- if (translation_pre_enabled(iommu))
- dev_iommu_priv_set(dev, DEFER_DEVICE_DOMAIN_INFO);
+ info = kzalloc(sizeof(*info), GFP_KERNEL);
+ if (!info)
+ return ERR_PTR(-ENOMEM);
+
+ if (dev_is_real_dma_subdevice(dev)) {
+ info->bus = pdev->bus->number;
+ info->devfn = pdev->devfn;
+ info->segment = pci_domain_nr(pdev->bus);
+ } else {
+ info->bus = bus;
+ info->devfn = devfn;
+ info->segment = iommu->segment;
+ }
+
+ info->dev = dev;
+ info->iommu = iommu;
+ if (dev_is_pci(dev)) {
+ if (ecap_dev_iotlb_support(iommu->ecap) &&
+ pci_ats_supported(pdev) &&
+ dmar_find_matched_atsr_unit(pdev))
+ info->ats_supported = 1;
+
+ if (sm_supported(iommu)) {
+ if (pasid_supported(iommu)) {
+ int features = pci_pasid_features(pdev);
+
+ if (features >= 0)
+ info->pasid_supported = features | 1;
+ }
+
+ if (info->ats_supported && ecap_prs(iommu->ecap) &&
+ pci_pri_supported(pdev))
+ info->pri_supported = 1;
+ }
+ }
+
+ spin_lock_irqsave(&device_domain_lock, flags);
+ list_add(&info->global, &device_domain_list);
+ dev_iommu_priv_set(dev, info);
+ spin_unlock_irqrestore(&device_domain_lock, flags);
return &iommu->iommu;
}
@@ -4635,7 +4613,9 @@ intel_iommu_dev_disable_feat(struct device *dev, enum iommu_dev_features feat)
static bool intel_iommu_is_attach_deferred(struct device *dev)
{
- return attach_deferred(dev);
+ struct device_domain_info *info = get_domain_info(dev);
+
+ return translation_pre_enabled(info->iommu) && !info->domain;
}
/*
--
2.25.1
next prev parent reply other threads:[~2022-02-07 7:00 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-02-07 6:41 [PATCH v1 00/10] iommu/vt-d: Some Intel IOMMU cleanups Lu Baolu
2022-02-07 6:41 ` [PATCH v1 01/10] iommu/vt-d: Move DMAR specific helpers into dmar.c Lu Baolu
2022-02-07 7:08 ` Christoph Hellwig
2022-02-08 4:27 ` Lu Baolu
2022-02-07 6:41 ` [PATCH v1 02/10] iommu/vt-d: Remove intel_iommu::domains Lu Baolu
2022-02-07 7:09 ` Christoph Hellwig
2022-02-07 6:41 ` [PATCH v1 03/10] iommu/vt-d: Remove finding domain in dmar_insert_one_dev_info() Lu Baolu
2022-02-07 7:10 ` Christoph Hellwig
2022-02-07 6:41 ` [PATCH v1 04/10] iommu/vt-d: Remove iova_cache_get/put() Lu Baolu
2022-02-07 7:10 ` Christoph Hellwig
2022-02-07 10:39 ` John Garry
2022-02-08 4:29 ` Lu Baolu
2022-02-07 6:41 ` [PATCH v1 05/10] iommu/vt-d: Remove domain and devinfo mempool Lu Baolu
2022-02-07 7:10 ` Christoph Hellwig
2022-02-07 6:41 ` Lu Baolu [this message]
2022-02-07 7:12 ` [PATCH v1 06/10] iommu/vt-d: Remove DEFER_DEVICE_DOMAIN_INFO Christoph Hellwig
2022-02-08 4:31 ` Lu Baolu
2022-02-07 6:41 ` [PATCH v1 07/10] iommu/vt-d: Use an xarray for global device_domain_info Lu Baolu
2022-02-07 7:14 ` Christoph Hellwig
2022-02-08 4:38 ` Lu Baolu
2022-02-07 6:41 ` [PATCH v1 08/10] iommu/vt-d: Use rculist for dmar_domain::devices Lu Baolu
2022-02-07 6:41 ` [PATCH v1 09/10] iommu/vt-d: Refactor dmar_insert_one_dev_info() Lu Baolu
2022-02-07 18:27 ` Jacob Pan
2022-02-08 4:55 ` Lu Baolu
2022-02-25 22:09 ` Jacob Pan
2022-02-07 6:41 ` [PATCH v1 10/10] iommu/vt-d: Some cleanups in iommu.c Lu Baolu
2022-02-07 7:15 ` Christoph Hellwig
2022-02-08 4:58 ` Lu Baolu
2022-02-11 13:01 ` [PATCH v1 00/10] iommu/vt-d: Some Intel IOMMU cleanups Jason Gunthorpe
2022-02-14 0:26 ` Lu Baolu
2022-02-14 2:59 ` Lu Baolu
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