From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 64D1DC433F5 for ; Wed, 9 Feb 2022 12:00:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231826AbiBIMAH (ORCPT ); Wed, 9 Feb 2022 07:00:07 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57388 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231452AbiBIL5w (ORCPT ); Wed, 9 Feb 2022 06:57:52 -0500 Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 36491E00FED8; Wed, 9 Feb 2022 03:00:28 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1644404429; x=1675940429; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=BRMP6Uo4uFbPv2FKo1aqyoKoVbyJUj8pdBISKbB0UIU=; b=Qu8WFE0elgPxYW8h6dTZY6XvqQnPkDirDJjgBE52FqenZGYfwwGlZqt0 YXzm5sEmdAkGFjJk470ifmiAq5h1Riqnxvb1/O+nUG0R6wVtEw6cTOsA3 4K9zy2W3H7ekDn2qrAt1GOYSYahqosWOTA6tDF9cDqY2H/2Kr3X22YxG7 4EzhUfrlLoqGDHiBbPb298mWGTQWxV4eml8bTS2uV7DINl6KgoPwfALr+ S0rx2p95I+t6eP337i1DMHB1PKJ90htsxPbV5MnDlNJs8Av8WourmAfNK PgRlohKpqhv2MNbIuPRtnejBkE/gFe8f3JwrA4FJ334xo+f7uqR6d/07g A==; X-IronPort-AV: E=McAfee;i="6200,9189,10252"; a="247992184" X-IronPort-AV: E=Sophos;i="5.88,355,1635231600"; d="scan'208";a="247992184" Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Feb 2022 00:49:42 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.88,355,1635231600"; d="scan'208";a="568169190" Received: from ahunter-desktop.fi.intel.com ([10.237.72.92]) by orsmga001.jf.intel.com with ESMTP; 09 Feb 2022 00:49:34 -0800 From: Adrian Hunter To: Peter Zijlstra Cc: Alexander Shishkin , Arnaldo Carvalho de Melo , Jiri Olsa , linux-kernel@vger.kernel.org, Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, kvm@vger.kernel.org, H Peter Anvin , Mathieu Poirier , Suzuki K Poulose , Leo Yan Subject: [PATCH 01/11] perf/x86: Fix native_perf_sched_clock_from_tsc() with __sched_clock_offset Date: Wed, 9 Feb 2022 10:49:19 +0200 Message-Id: <20220209084929.54331-2-adrian.hunter@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220209084929.54331-1-adrian.hunter@intel.com> References: <20220209084929.54331-1-adrian.hunter@intel.com> MIME-Version: 1.0 Organization: Intel Finland Oy, Registered Address: PL 281, 00181 Helsinki, Business Identity Code: 0357606 - 4, Domiciled in Helsinki Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org native_perf_sched_clock_from_tsc() is used to produce a time value that can be consistent with perf_clock(). Consequently, it should be adjusted by __sched_clock_offset, the same as perf_clock() would be. Fixes: 698eff6355f735 ("sched/clock, x86/perf: Fix perf test tsc") Signed-off-by: Adrian Hunter --- arch/x86/kernel/tsc.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c index a698196377be..c1c73fe324cd 100644 --- a/arch/x86/kernel/tsc.c +++ b/arch/x86/kernel/tsc.c @@ -242,7 +242,8 @@ u64 native_sched_clock(void) */ u64 native_sched_clock_from_tsc(u64 tsc) { - return cycles_2_ns(tsc); + return cycles_2_ns(tsc) + + (sched_clock_stable() ? __sched_clock_offset : 0); } /* We need to define a real function for sched_clock, to override the -- 2.25.1