From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E238DC433FE for ; Mon, 14 Feb 2022 10:09:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1344373AbiBNKJi (ORCPT ); Mon, 14 Feb 2022 05:09:38 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:55002 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1345075AbiBNKFL (ORCPT ); Mon, 14 Feb 2022 05:05:11 -0500 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BD7CE674C0; Mon, 14 Feb 2022 01:49:22 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 59DE661238; Mon, 14 Feb 2022 09:49:22 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 2BEE6C340E9; Mon, 14 Feb 2022 09:49:20 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1644832161; bh=//OuiyRbUkKtrhHbbvyACmB4XH0fLoBKNgJELnnmHHg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=vvBQHrnVhJ9HgTf6WsRzKLwdJhU4Tn1d1lI66Rvn2uzAm1U36XP1nYwT66swuog/4 Fe1WDRbW6tl4Z1uGH6w8f21x2FLJ5sDmRCCiwauukImxH1Z9h+jVgZDGPCvJdRYiUn m9mzEpmHCA3LCnhLkFPQZ4euRoiiiTTY+FHEQ/q0= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Aurelien Jarno , Alexandre Ghiti , Palmer Dabbelt Subject: [PATCH 5.15 066/172] riscv: fix build with binutils 2.38 Date: Mon, 14 Feb 2022 10:25:24 +0100 Message-Id: <20220214092508.680242400@linuxfoundation.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220214092506.354292783@linuxfoundation.org> References: <20220214092506.354292783@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Aurelien Jarno commit 6df2a016c0c8a3d0933ef33dd192ea6606b115e3 upstream. >>From version 2.38, binutils default to ISA spec version 20191213. This means that the csr read/write (csrr*/csrw*) instructions and fence.i instruction has separated from the `I` extension, become two standalone extensions: Zicsr and Zifencei. As the kernel uses those instruction, this causes the following build failure: CC arch/riscv/kernel/vdso/vgettimeofday.o <>/arch/riscv/include/asm/vdso/gettimeofday.h: Assembler messages: <>/arch/riscv/include/asm/vdso/gettimeofday.h:71: Error: unrecognized opcode `csrr a5,0xc01' <>/arch/riscv/include/asm/vdso/gettimeofday.h:71: Error: unrecognized opcode `csrr a5,0xc01' <>/arch/riscv/include/asm/vdso/gettimeofday.h:71: Error: unrecognized opcode `csrr a5,0xc01' <>/arch/riscv/include/asm/vdso/gettimeofday.h:71: Error: unrecognized opcode `csrr a5,0xc01' The fix is to specify those extensions explicitely in -march. However as older binutils version do not support this, we first need to detect that. Signed-off-by: Aurelien Jarno Tested-by: Alexandre Ghiti Cc: stable@vger.kernel.org Signed-off-by: Palmer Dabbelt Signed-off-by: Greg Kroah-Hartman --- arch/riscv/Makefile | 6 ++++++ 1 file changed, 6 insertions(+) --- a/arch/riscv/Makefile +++ b/arch/riscv/Makefile @@ -52,6 +52,12 @@ riscv-march-$(CONFIG_ARCH_RV32I) := rv32 riscv-march-$(CONFIG_ARCH_RV64I) := rv64ima riscv-march-$(CONFIG_FPU) := $(riscv-march-y)fd riscv-march-$(CONFIG_RISCV_ISA_C) := $(riscv-march-y)c + +# Newer binutils versions default to ISA spec version 20191213 which moves some +# instructions from the I extension to the Zicsr and Zifencei extensions. +toolchain-need-zicsr-zifencei := $(call cc-option-yn, -march=$(riscv-march-y)_zicsr_zifencei) +riscv-march-$(toolchain-need-zicsr-zifencei) := $(riscv-march-y)_zicsr_zifencei + KBUILD_CFLAGS += -march=$(subst fd,,$(riscv-march-y)) KBUILD_AFLAGS += -march=$(riscv-march-y)