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From: kernel test robot <lkp@intel.com>
To: Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
	linux-crypto@vger.kernel.org, linux-kernel@vger.kernel.org
Cc: kbuild-all@lists.01.org, Herbert Xu <herbert@gondor.apana.org.au>
Subject: Re: [PATCH v1 1/1] crypto: cavium/nitrox - don't cast parameter in bit operations
Date: Wed, 16 Feb 2022 04:35:27 +0800	[thread overview]
Message-ID: <202202160443.hqpSAgbP-lkp@intel.com> (raw)
In-Reply-To: <20220215160641.51683-1-andriy.shevchenko@linux.intel.com>

Hi Andy,

I love your patch! Yet something to improve:

[auto build test ERROR on herbert-cryptodev-2.6/master]
[also build test ERROR on herbert-crypto-2.6/master linux/master linus/master v5.17-rc4 next-20220215]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:    https://github.com/0day-ci/linux/commits/Andy-Shevchenko/crypto-cavium-nitrox-don-t-cast-parameter-in-bit-operations/20220216-000941
base:   https://git.kernel.org/pub/scm/linux/kernel/git/herbert/cryptodev-2.6.git master
config: x86_64-rhel-8.3 (https://download.01.org/0day-ci/archive/20220216/202202160443.hqpSAgbP-lkp@intel.com/config)
compiler: gcc-9 (Debian 9.3.0-22) 9.3.0
reproduce (this is a W=1 build):
        # https://github.com/0day-ci/linux/commit/51e27f6f33d377023ec5e097d18acb18f992f551
        git remote add linux-review https://github.com/0day-ci/linux
        git fetch --no-tags linux-review Andy-Shevchenko/crypto-cavium-nitrox-don-t-cast-parameter-in-bit-operations/20220216-000941
        git checkout 51e27f6f33d377023ec5e097d18acb18f992f551
        # save the config file to linux build tree
        mkdir build_dir
        make W=1 O=build_dir ARCH=x86_64 SHELL=/bin/bash drivers/crypto/cavium/nitrox/

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>

All errors (new ones prefixed by >>):

   drivers/crypto/cavium/nitrox/nitrox_mbx.c: In function 'nitrox_pf2vf_mbox_handler':
>> drivers/crypto/cavium/nitrox/nitrox_mbx.c:126:2: error: implicit declaration of function 'DEFINE_BITMAP'; did you mean 'DEFINE_TIMER'? [-Werror=implicit-function-declaration]
     126 |  DEFINE_BITMAP(csr, 64);
         |  ^~~~~~~~~~~~~
         |  DEFINE_TIMER
>> drivers/crypto/cavium/nitrox/nitrox_mbx.c:126:16: error: 'csr' undeclared (first use in this function); did you mean 'msr'?
     126 |  DEFINE_BITMAP(csr, 64);
         |                ^~~
         |                msr
   drivers/crypto/cavium/nitrox/nitrox_mbx.c:126:16: note: each undeclared identifier is reported only once for each function it appears in
   drivers/crypto/cavium/nitrox/nitrox_mbx.c:127:2: warning: ISO C90 forbids mixed declarations and code [-Wdeclaration-after-statement]
     127 |  u64 value, reg_addr;
         |  ^~~
   cc1: some warnings being treated as errors


vim +126 drivers/crypto/cavium/nitrox/nitrox_mbx.c

   121	
   122	void nitrox_pf2vf_mbox_handler(struct nitrox_device *ndev)
   123	{
   124		struct nitrox_vfdev *vfdev;
   125		struct pf2vf_work *pfwork;
 > 126		DEFINE_BITMAP(csr, 64);
   127		u64 value, reg_addr;
   128		u32 i;
   129		int vfno;
   130	
   131		/* loop for VF(0..63) */
   132		reg_addr = NPS_PKT_MBOX_INT_LO;
   133		value = nitrox_read_csr(ndev, reg_addr);
   134		bitmap_from_u64(csr, value);
   135		for_each_set_bit(i, csr, BITS_PER_TYPE(csr)) {
   136			/* get the vfno from ring */
   137			vfno = RING_TO_VFNO(i, ndev->iov.max_vf_queues);
   138			vfdev = ndev->iov.vfdev + vfno;
   139			vfdev->ring = i;
   140			/* fill the vf mailbox data */
   141			vfdev->msg.value = pf2vf_read_mbox(ndev, vfdev->ring);
   142			pfwork = kzalloc(sizeof(*pfwork), GFP_ATOMIC);
   143			if (!pfwork)
   144				continue;
   145	
   146			pfwork->vfdev = vfdev;
   147			pfwork->ndev = ndev;
   148			INIT_WORK(&pfwork->pf2vf_resp, pf2vf_resp_handler);
   149			queue_work(ndev->iov.pf2vf_wq, &pfwork->pf2vf_resp);
   150			/* clear the corresponding vf bit */
   151			nitrox_write_csr(ndev, reg_addr, BIT_ULL(i));
   152		}
   153	
   154		/* loop for VF(64..127) */
   155		reg_addr = NPS_PKT_MBOX_INT_HI;
   156		value = nitrox_read_csr(ndev, reg_addr);
   157		bitmap_from_u64(csr, value);
   158		for_each_set_bit(i, csr, BITS_PER_TYPE(csr)) {
   159			/* get the vfno from ring */
   160			vfno = RING_TO_VFNO(i + 64, ndev->iov.max_vf_queues);
   161			vfdev = ndev->iov.vfdev + vfno;
   162			vfdev->ring = (i + 64);
   163			/* fill the vf mailbox data */
   164			vfdev->msg.value = pf2vf_read_mbox(ndev, vfdev->ring);
   165	
   166			pfwork = kzalloc(sizeof(*pfwork), GFP_ATOMIC);
   167			if (!pfwork)
   168				continue;
   169	
   170			pfwork->vfdev = vfdev;
   171			pfwork->ndev = ndev;
   172			INIT_WORK(&pfwork->pf2vf_resp, pf2vf_resp_handler);
   173			queue_work(ndev->iov.pf2vf_wq, &pfwork->pf2vf_resp);
   174			/* clear the corresponding vf bit */
   175			nitrox_write_csr(ndev, reg_addr, BIT_ULL(i));
   176		}
   177	}
   178	

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org

  parent reply	other threads:[~2022-02-15 20:36 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-02-15 16:06 [PATCH v1 1/1] crypto: cavium/nitrox - don't cast parameter in bit operations Andy Shevchenko
2022-02-15 19:03 ` kernel test robot
2022-02-15 20:35 ` kernel test robot [this message]
2022-02-23  2:52 ` Herbert Xu
2022-02-23 11:09   ` Andy Shevchenko

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