[RFC PATCH 0/2] Risc-V Svinval support

Mayuresh Chitale
2022-02-16T05:21:47Z

This patch adds support for the Svinval extension version 1.0 as defined in the
Risc V Privileged specification. It depends on and needs to be applied on the
following patchsets from Atish and Anup respectively:

https://patchwork.kernel.org/project/linux-riscv/list/?series=613234
https://patchwork.kernel.org/project/linux-riscv/list/?series=609361

The feature was tested with qemu from latest staging branch with following
additional patch:
https://lists.nongnu.org/archive/html/qemu-riscv/2022-02/msg00100.html

Mayuresh Chitale (2):
riscv: enum for svinval extension
riscv: mm: use svinval instructions instead of sfence.vma

arch/riscv/include/asm/hwcap.h | 1 +
arch/riscv/include/asm/tlbflush.h | 14 +++++++
arch/riscv/kernel/cpu.c | 1 +
arch/riscv/kernel/setup.c | 1 +
arch/riscv/mm/Makefile | 1 +
arch/riscv/mm/tlb.S | 53 +++++++++++++++++++++++
arch/riscv/mm/tlbflush.c | 70 ++++++++++++++++++++++++++++---
7 files changed, 135 insertions(+), 6 deletions(-)
create mode 100644 arch/riscv/mm/tlb.S

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2.25.1