From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A38FEC433FE for ; Tue, 22 Feb 2022 15:37:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232172AbiBVPiS (ORCPT ); Tue, 22 Feb 2022 10:38:18 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52918 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231244AbiBVPiP (ORCPT ); Tue, 22 Feb 2022 10:38:15 -0500 Received: from jabberwock.ucw.cz (jabberwock.ucw.cz [46.255.230.98]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 82860163054; Tue, 22 Feb 2022 07:37:50 -0800 (PST) Received: by jabberwock.ucw.cz (Postfix, from userid 1017) id 4AAD81C0B85; Tue, 22 Feb 2022 16:37:49 +0100 (CET) Date: Tue, 22 Feb 2022 16:37:48 +0100 From: Pavel Machek To: Greg Kroah-Hartman Cc: linux-kernel@vger.kernel.org, stable@vger.kernel.org, Jim Mattson , David Dunn , Paolo Bonzini , Sasha Levin Subject: Re: [PATCH 4.19 49/58] KVM: x86/pmu: Use AMD64_RAW_EVENT_MASK for PERF_TYPE_RAW Message-ID: <20220222153748.GB27262@amd> References: <20220221084911.895146879@linuxfoundation.org> <20220221084913.456697491@linuxfoundation.org> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="xgyAXRrhYN0wYx8y" Content-Disposition: inline In-Reply-To: <20220221084913.456697491@linuxfoundation.org> User-Agent: Mutt/1.5.23 (2014-03-12) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org --xgyAXRrhYN0wYx8y Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Hi! > [ Upstream commit 710c476514313c74045c41c0571bb5178fd16e3d ] >=20 > AMD's event select is 3 nybbles, with the high nybble in bits 35:32 of > a PerfEvtSeln MSR. Don't mask off the high nybble when configuring a > RAW perf event. Ok, but this depends on b8bfee "KVM: x86/pmu: Don't truncate the PerfEvtSeln MSR when creating a perf event", and that is backported to 5.10 but not 4.19... so we don't need this, either, right...? Best regards, Pavel > +++ b/arch/x86/kvm/pmu.c > @@ -171,7 +171,7 @@ void reprogram_gp_counter(struct kvm_pmc *pmc, u64 ev= entsel) > } > =20 > if (type =3D=3D PERF_TYPE_RAW) > - config =3D eventsel & X86_RAW_EVENT_MASK; > + config =3D eventsel & AMD64_RAW_EVENT_MASK; > =20 > pmc_reprogram_counter(pmc, type, config, > !(eventsel & ARCH_PERFMON_EVENTSEL_USR), --=20 http://www.livejournal.com/~pavelmachek --xgyAXRrhYN0wYx8y Content-Type: application/pgp-signature; name="signature.asc" Content-Description: Digital signature -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iEYEARECAAYFAmIVA0wACgkQMOfwapXb+vLfFACgvMQ5hThWaFoiuxPemG2r6RU7 0UIAn13dppGITFWS18CmloU6xPvZShoe =ArCk -----END PGP SIGNATURE----- --xgyAXRrhYN0wYx8y--