From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6664DC433F5 for ; Tue, 1 Mar 2022 04:28:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231758AbiCAE3B (ORCPT ); Mon, 28 Feb 2022 23:29:01 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40968 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230125AbiCAE26 (ORCPT ); Mon, 28 Feb 2022 23:28:58 -0500 Received: from mail-wr1-x436.google.com (mail-wr1-x436.google.com [IPv6:2a00:1450:4864:20::436]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CE6744B1F7 for ; Mon, 28 Feb 2022 20:28:17 -0800 (PST) Received: by mail-wr1-x436.google.com with SMTP id d17so18433336wrc.9 for ; Mon, 28 Feb 2022 20:28:17 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=FXY/vIDKe6DGMfSlwt+/9lV29k2hg5m2ZOntq1vLjB8=; b=YbnXH3Ozn3b9HuBAgiYG8VYMa0eOjwf/1cC77kCVzifGNvBgFVcGkgDMYeYYXRH8KX es6Pci779Tb3Cls9xAqKDX7GugD/Dsd0qxsy1LhmQWF/bbrE8sLledQ46d/t+kJLM2h0 2nmhVFLz2WzopUZldR98pJSf/E8XpEbqU48o35VqiBNyAyxKX2DN3GSu0MMBnvkRciC/ O1IwurKtAWLHLohAVHuabupg3Ft23YKFTT8vUUIwDPmZTFyiRoY6XHjAEbOmT27Df7Bw gFWwGDuJ/qUEX+T6jMQDGDhAN8v10v8UUjwEqgGcdip8k1mxrmdUrLi+barpR2/V09sJ 1Zvw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=FXY/vIDKe6DGMfSlwt+/9lV29k2hg5m2ZOntq1vLjB8=; b=tvB/e2CSsbCB49v+6byxgkL6jAyV+d9HgMEjHIDnRNfvzR/m4Sk3CyVhT1+o8RRiVF 50ivBXAVtryrTPg82RG9ZKyzVn3mYIjDqg2KXJz0gjgUSk7wdMwCSRnFJmuREDzqKzFj PfcB2JiMEnyp0buxHuZVq7438IogSsjxLx8tXPyB594/RNuQDLEsWAkF3pgJ2g9LXITa 0QALt4nv84mjvK2R4T3U8w+640ib7oKT66kcMfBov5RSheDpCkyv4SkvgyA2vmqdssS+ ySCXfRMD3HaWa+8YwkNzQQ3qnLVvx+FLmyrQddQ0HxQxehxLjHr2Ck7niMj6kjHRgg3E s2IQ== X-Gm-Message-State: AOAM531zlZX3Ib1rQZoW7a3XcIIBGQVMYQS2cWNXVFAQz3z9vY/vWwvF gTakZHdmcF/4uzl/46++5BqaYQ== X-Google-Smtp-Source: ABdhPJyDCf0PIM7Cz+LWsyEXEFiULxZskjWLp/zzvJEeRGlDKz00FVkpH24DcxMgGallV6oJWtBFeQ== X-Received: by 2002:a05:6000:11c8:b0:1f0:d64:fb0c with SMTP id i8-20020a05600011c800b001f00d64fb0cmr908247wrx.279.1646108896435; Mon, 28 Feb 2022 20:28:16 -0800 (PST) Received: from localhost.localdomain ([122.179.35.69]) by smtp.gmail.com with ESMTPSA id 2-20020a1c1902000000b00380d3873d6asm1209107wmz.43.2022.02.28.20.28.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 28 Feb 2022 20:28:16 -0800 (PST) From: Anup Patel To: Palmer Dabbelt , Paul Walmsley , Thomas Gleixner , Marc Zyngier , Daniel Lezcano Cc: Atish Patra , Alistair Francis , Anup Patel , linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Anup Patel , Bin Meng Subject: [PATCH v4 1/6] RISC-V: Clear SIP bit only when using SBI IPI operations Date: Tue, 1 Mar 2022 09:57:17 +0530 Message-Id: <20220301042722.401113-2-apatel@ventanamicro.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220301042722.401113-1-apatel@ventanamicro.com> References: <20220301042722.401113-1-apatel@ventanamicro.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The software interrupt pending (i.e. [M|S]SIP) bit is writeable for S-mode but read-only for M-mode so we clear this bit only when using SBI IPI operations. Signed-off-by: Anup Patel Reviewed-by: Bin Meng --- arch/riscv/kernel/sbi.c | 8 +++++++- arch/riscv/kernel/smp.c | 2 -- 2 files changed, 7 insertions(+), 3 deletions(-) diff --git a/arch/riscv/kernel/sbi.c b/arch/riscv/kernel/sbi.c index 775d3322b422..fc614650a2e3 100644 --- a/arch/riscv/kernel/sbi.c +++ b/arch/riscv/kernel/sbi.c @@ -643,8 +643,14 @@ static void sbi_send_cpumask_ipi(const struct cpumask *target) sbi_send_ipi(target); } +static void sbi_ipi_clear(void) +{ + csr_clear(CSR_IP, IE_SIE); +} + static const struct riscv_ipi_ops sbi_ipi_ops = { - .ipi_inject = sbi_send_cpumask_ipi + .ipi_inject = sbi_send_cpumask_ipi, + .ipi_clear = sbi_ipi_clear }; void __init sbi_init(void) diff --git a/arch/riscv/kernel/smp.c b/arch/riscv/kernel/smp.c index b5d30ea92292..6fd8b3cbec1b 100644 --- a/arch/riscv/kernel/smp.c +++ b/arch/riscv/kernel/smp.c @@ -89,8 +89,6 @@ void riscv_clear_ipi(void) { if (ipi_ops && ipi_ops->ipi_clear) ipi_ops->ipi_clear(); - - csr_clear(CSR_IP, IE_SIE); } EXPORT_SYMBOL_GPL(riscv_clear_ipi); -- 2.25.1