From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 24D1DC433F5 for ; Wed, 2 Mar 2022 03:08:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239245AbiCBDJL (ORCPT ); Tue, 1 Mar 2022 22:09:11 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47154 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236655AbiCBDJJ (ORCPT ); Tue, 1 Mar 2022 22:09:09 -0500 Received: from twspam01.aspeedtech.com (twspam01.aspeedtech.com [211.20.114.71]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 662E9E0A1 for ; Tue, 1 Mar 2022 19:08:27 -0800 (PST) Received: from twspam01.aspeedtech.com (localhost [127.0.0.2] (may be forged)) by twspam01.aspeedtech.com with ESMTP id 2222fM1M029342 for ; Wed, 2 Mar 2022 10:41:22 +0800 (GMT-8) (envelope-from tommy_huang@aspeedtech.com) Received: from mail.aspeedtech.com ([192.168.0.24]) by twspam01.aspeedtech.com with ESMTP id 2222eK6t029211; Wed, 2 Mar 2022 10:40:20 +0800 (GMT-8) (envelope-from tommy_huang@aspeedtech.com) Received: from tommy0527-VirtualBox.aspeedtech.com (192.168.2.141) by TWMBX02.aspeed.com (192.168.0.24) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Wed, 2 Mar 2022 10:49:41 +0800 From: Tommy Haung To: , , , , , , , , , CC: Subject: [PATCH v6 5/5] ARM: dtsi: aspeed: Modified gfx reset control Date: Wed, 2 Mar 2022 10:49:30 +0800 Message-ID: <20220302024930.18758-6-tommy_huang@aspeedtech.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220302024930.18758-1-tommy_huang@aspeedtech.com> References: <20220302024930.18758-1-tommy_huang@aspeedtech.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [192.168.2.141] X-ClientProxiedBy: TWMBX02.aspeed.com (192.168.0.24) To TWMBX02.aspeed.com (192.168.0.24) X-DNSRBL: X-MAIL: twspam01.aspeedtech.com 2222eK6t029211 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Remove the ast2500-gfx from aspeed-g6.dtsi. In the AST2600, the ASPEED_RESET_CRT1 is replaced by ASPEED_RESET_GRAPHICS. This is no differnce between these two reset behavior but reigster location is changed. The HW controller states and FW programming resgiter will be reset by CRT reset controller bit (SCU040[13]). And another part HW controller will be reset by Graphics controller bit (SCU040[26]). These two reset bit need be de-assert then the SOC display will be active. Signed-off-by: Tommy Haung --- arch/arm/boot/dts/aspeed-g6.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed-g6.dtsi index e38c3742761b..7cc99bc68558 100644 --- a/arch/arm/boot/dts/aspeed-g6.dtsi +++ b/arch/arm/boot/dts/aspeed-g6.dtsi @@ -352,7 +352,7 @@ }; gfx: display@1e6e6000 { - compatible = "aspeed,ast2600-gfx", "aspeed,ast2500-gfx", "syscon"; + compatible = "aspeed,ast2600-gfx", "syscon"; reg = <0x1e6e6000 0x1000>; reg-io-width = <4>; clocks = <&syscon ASPEED_CLK_GATE_D1CLK>; -- 2.17.1