From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 70A62C433F5 for ; Thu, 10 Mar 2022 22:12:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244493AbiCJWNP (ORCPT ); Thu, 10 Mar 2022 17:13:15 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38036 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1344206AbiCJWNM (ORCPT ); Thu, 10 Mar 2022 17:13:12 -0500 Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4A7ED1965D5 for ; Thu, 10 Mar 2022 14:12:09 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1646950329; x=1678486329; h=date:from:to:cc:subject:message-id:mime-version; bh=UewVuhQaCjCdHTVDQx3SfR/44XuKb97nfoSzDsCJ17c=; b=LvG9acZIMYT2ZM1wY5hx0Y1BR5Slf7N5+ZL+C2CnwokP2/ZJ0Wt9s/2w mDhIzjubsd2dATDNJCnWs04VrTSo/gWvifF+2VF6FpUlqs47Htho0m00+ /GVyl9HpuHmJZOa2gFSNwp8+xPutOibZGoW1WKfrgCJ3s/3hqmi+ZtzS5 40H1LK0VMEOqLAf3IZMjppmwVSv4McRgBazN+8JEXQdCxStnimMQsEVG2 fVesIhjSx3Qzf7lspSHA99Xok4PFkwVW6y+VhVkQJQ29KOB8flLQHcp8d YJcQkCW4ySch91RAtuN55p8QNbESJkKDhw3fnjR85lxc2Dx/iQSu1mXav w==; X-IronPort-AV: E=McAfee;i="6200,9189,10282"; a="235345636" X-IronPort-AV: E=Sophos;i="5.90,171,1643702400"; d="scan'208";a="235345636" Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Mar 2022 14:12:05 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.90,171,1643702400"; d="scan'208";a="578978445" Received: from lkp-server02.sh.intel.com (HELO 89b41b6ae01c) ([10.239.97.151]) by orsmga001.jf.intel.com with ESMTP; 10 Mar 2022 14:12:04 -0800 Received: from kbuild by 89b41b6ae01c with local (Exim 4.92) (envelope-from ) id 1nSR0t-0005Ss-QX; Thu, 10 Mar 2022 22:12:03 +0000 Date: Fri, 11 Mar 2022 06:11:42 +0800 From: kernel test robot To: Tom Cc: kbuild-all@lists.01.org, linux-kernel@vger.kernel.org, Emil Renner Berthing Subject: [esmil:visionfive 29/64] drivers/soc/sifive/sifive_l2_cache.c:152:17: error: implicit declaration of function 'writeq'; did you mean 'writeb'? Message-ID: <202203110634.lyi263Cj-lkp@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline User-Agent: Mutt/1.10.1 (2018-07-13) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org tree: https://github.com/esmil/linux visionfive head: 996f88ea65b2f557926d7fe73d69fdc2da92430a commit: def7ba448ac4b53b788d238985ef97702dc802a1 [29/64] sifive/sifive_l2_cache: Add sifive_l2_flush64_range function config: riscv-randconfig-r033-20220310 (https://download.01.org/0day-ci/archive/20220311/202203110634.lyi263Cj-lkp@intel.com/config) compiler: riscv32-linux-gcc (GCC) 11.2.0 reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # https://github.com/esmil/linux/commit/def7ba448ac4b53b788d238985ef97702dc802a1 git remote add esmil https://github.com/esmil/linux git fetch --no-tags esmil visionfive git checkout def7ba448ac4b53b788d238985ef97702dc802a1 # save the config file to linux build tree mkdir build_dir COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-11.2.0 make.cross O=build_dir ARCH=riscv SHELL=/bin/bash If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot All errors (new ones prefixed by >>): drivers/soc/sifive/sifive_l2_cache.c: In function 'sifive_l2_flush64_range': >> drivers/soc/sifive/sifive_l2_cache.c:152:17: error: implicit declaration of function 'writeq'; did you mean 'writeb'? [-Werror=implicit-function-declaration] 152 | writeq(line, l2_base + SIFIVE_L2_FLUSH64); | ^~~~~~ | writeb cc1: some warnings being treated as errors vim +152 drivers/soc/sifive/sifive_l2_cache.c 123 124 #ifdef CONFIG_SIFIVE_L2_FLUSH 125 void sifive_l2_flush64_range(unsigned long start, unsigned long len) 126 { 127 unsigned long line; 128 129 if(!l2_base) { 130 pr_warn("L2CACHE: base addr invalid, skipping flush\n"); 131 return; 132 } 133 134 /* TODO: if (len == 0), skipping flush or going on? */ 135 if(!len) { 136 pr_debug("L2CACHE: flush64 range @ 0x%lx(len:0)\n", start); 137 return; 138 } 139 140 /* make sure the address is in the range */ 141 if(start < CONFIG_SIFIVE_L2_FLUSH_START || 142 (start + len) > (CONFIG_SIFIVE_L2_FLUSH_START + 143 CONFIG_SIFIVE_L2_FLUSH_SIZE)) { 144 pr_warn("L2CACHE: flush64 out of range: %lx(%lx), skip flush\n", 145 start, len); 146 return; 147 } 148 149 mb(); /* sync */ 150 for (line = start; line < start + len; 151 line += SIFIVE_L2_FLUSH64_LINE_LEN) { > 152 writeq(line, l2_base + SIFIVE_L2_FLUSH64); 153 mb(); 154 } 155 } 156 EXPORT_SYMBOL_GPL(sifive_l2_flush64_range); 157 #endif 158 --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org