Re: [PATCH v2 5/8] iommu: Add PASID support for DMA mapping API users

Jacob Pan
2022-03-15T21:21:24Z

Hi Jason,

On Tue, 15 Mar 2022 14:05:07 -0300, Jason Gunthorpe <jgg@nvidia.com> wrote:

> On Tue, Mar 15, 2022 at 09:31:35AM -0700, Jacob Pan wrote:
>
> > > IMHO it is a device mis-design of IDXD to require all DMA be PASID
> > > tagged. Devices should be able to do DMA on their RID when the PCI
>
> > IDXD can do DMA w/ RID, the PASID requirement is only for shared WQ
> > where ENQCMDS is used. ENQCMDS has the benefit of avoiding locking
> > where work submission is done from multiple CPUs.
> > Tony, Dave?
>
> This is what I mean, it has an operating mode you want to use from the
> kernel driver that cannot do RID DMA. It is a HW mis-design, IMHO.
>
> Something like PASID0 in the ENQCMDS should have triggered RID DMA.
>
That would simplify things a lot, it would be just a device change I think.
From IA pov, only ENQCMD will #GP if PASID==0. I will bring this back to HW
team to consider for future generations.

> > > In any case I think we are better to wait for an actual user for multi
> > > DMA API iommu_domains to come forward before we try to build an API
> > > for it.
> >
> > What would you recommend in the interim?
>
> Oh, I mean this approach at a high level is fine - I was saying we
> shouldn't try to broaden it like Robin was suggesting without a driver
> that needs multiple iommu_domains for the DMA API.
>
Got it. Thanks for the clarification.

> Jason

Thanks,

Jacob