From: Adam Ford <aford173@gmail.com>
To: linux-arm-kernel@lists.infradead.org
Cc: aford@beaconembedded.com, Adam Ford <aford173@gmail.com>,
Shawn Guo <shawnguo@kernel.org>,
Sascha Hauer <s.hauer@pengutronix.de>,
Pengutronix Kernel Team <kernel@pengutronix.de>,
Fabio Estevam <festevam@gmail.com>,
NXP Linux Team <linux-imx@nxp.com>,
Lucas Stach <l.stach@pengutronix.de>,
linux-kernel@vger.kernel.org
Subject: [PATCH V2] soc: imx: imx8m-blk-ctrl: Fix IMX8MN_DISPBLK_PD_ISI hang
Date: Sun, 20 Mar 2022 15:52:12 -0500 [thread overview]
Message-ID: <20220320205212.701548-1-aford173@gmail.com> (raw)
The imx8mn clock list for the ISI lists four clocks, but DOMAIN_MAX_CLKS
was set to 3. Because of this, attempts to enable the fourth clock failed,
threw some splat, and ultimately hung.
Fixes: 7f511d514e8c ("soc: imx: imx8m-blk-ctrl: add i.MX8MN DISP blk-ctrl")
Signed-off-by: Adam Ford <aford173@gmail.com>
diff --git a/drivers/soc/imx/imx8m-blk-ctrl.c b/drivers/soc/imx/imx8m-blk-ctrl.c
index a0a0d2d7ca4a..7109f0d508e2 100644
--- a/drivers/soc/imx/imx8m-blk-ctrl.c
+++ b/drivers/soc/imx/imx8m-blk-ctrl.c
@@ -50,7 +50,7 @@ struct imx8m_blk_ctrl_domain_data {
u32 mipi_phy_rst_mask;
};
-#define DOMAIN_MAX_CLKS 3
+#define DOMAIN_MAX_CLKS 4
struct imx8m_blk_ctrl_domain {
struct generic_pm_domain genpd;
--
2.34.1
next reply other threads:[~2022-03-20 20:58 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-03-20 20:52 Adam Ford [this message]
2022-03-21 10:58 ` [PATCH V2] soc: imx: imx8m-blk-ctrl: Fix IMX8MN_DISPBLK_PD_ISI hang Lucas Stach
2022-04-10 1:32 ` Shawn Guo
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