* [PATCH v2] RISC-V: Enable profiling by default
@ 2022-03-24 5:30 Anup Patel
2022-03-24 21:55 ` Atish Patra
2022-03-31 22:31 ` Palmer Dabbelt
0 siblings, 2 replies; 3+ messages in thread
From: Anup Patel @ 2022-03-24 5:30 UTC (permalink / raw)
To: Palmer Dabbelt, Paul Walmsley
Cc: Atish Patra, Alistair Francis, Anup Patel, linux-riscv,
linux-kernel, Anup Patel
Let us enable profiling by default in RV32 and RV64 defconfigs so
that we can use RISC-V PMU drivers on various RISC-V platforms.
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
Changes since v1:
- Enable CONFIG_PROFILING instead of CONFIG_PREF_EVENTS in defconfigs
---
arch/riscv/configs/defconfig | 1 +
arch/riscv/configs/rv32_defconfig | 1 +
2 files changed, 2 insertions(+)
diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
index f120fcc43d0a..bfebee46784c 100644
--- a/arch/riscv/configs/defconfig
+++ b/arch/riscv/configs/defconfig
@@ -15,6 +15,7 @@ CONFIG_CHECKPOINT_RESTORE=y
CONFIG_BLK_DEV_INITRD=y
CONFIG_EXPERT=y
# CONFIG_SYSFS_SYSCALL is not set
+CONFIG_PROFILING=y
CONFIG_SOC_MICROCHIP_POLARFIRE=y
CONFIG_SOC_SIFIVE=y
CONFIG_SOC_VIRT=y
diff --git a/arch/riscv/configs/rv32_defconfig b/arch/riscv/configs/rv32_defconfig
index 8b56a7f1eb06..2b68b1bd2559 100644
--- a/arch/riscv/configs/rv32_defconfig
+++ b/arch/riscv/configs/rv32_defconfig
@@ -15,6 +15,7 @@ CONFIG_CHECKPOINT_RESTORE=y
CONFIG_BLK_DEV_INITRD=y
CONFIG_EXPERT=y
# CONFIG_SYSFS_SYSCALL is not set
+CONFIG_PROFILING=y
CONFIG_SOC_SIFIVE=y
CONFIG_SOC_VIRT=y
CONFIG_ARCH_RV32I=y
--
2.25.1
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH v2] RISC-V: Enable profiling by default
2022-03-24 5:30 [PATCH v2] RISC-V: Enable profiling by default Anup Patel
@ 2022-03-24 21:55 ` Atish Patra
2022-03-31 22:31 ` Palmer Dabbelt
1 sibling, 0 replies; 3+ messages in thread
From: Atish Patra @ 2022-03-24 21:55 UTC (permalink / raw)
To: Anup Patel
Cc: Palmer Dabbelt, Paul Walmsley, Alistair Francis, Anup Patel,
linux-riscv, linux-kernel@vger.kernel.org List
On Wed, Mar 23, 2022 at 10:31 PM Anup Patel <apatel@ventanamicro.com> wrote:
>
> Let us enable profiling by default in RV32 and RV64 defconfigs so
> that we can use RISC-V PMU drivers on various RISC-V platforms.
>
> Signed-off-by: Anup Patel <apatel@ventanamicro.com>
> ---
> Changes since v1:
> - Enable CONFIG_PROFILING instead of CONFIG_PREF_EVENTS in defconfigs
> ---
> arch/riscv/configs/defconfig | 1 +
> arch/riscv/configs/rv32_defconfig | 1 +
> 2 files changed, 2 insertions(+)
>
> diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
> index f120fcc43d0a..bfebee46784c 100644
> --- a/arch/riscv/configs/defconfig
> +++ b/arch/riscv/configs/defconfig
> @@ -15,6 +15,7 @@ CONFIG_CHECKPOINT_RESTORE=y
> CONFIG_BLK_DEV_INITRD=y
> CONFIG_EXPERT=y
> # CONFIG_SYSFS_SYSCALL is not set
> +CONFIG_PROFILING=y
> CONFIG_SOC_MICROCHIP_POLARFIRE=y
> CONFIG_SOC_SIFIVE=y
> CONFIG_SOC_VIRT=y
> diff --git a/arch/riscv/configs/rv32_defconfig b/arch/riscv/configs/rv32_defconfig
> index 8b56a7f1eb06..2b68b1bd2559 100644
> --- a/arch/riscv/configs/rv32_defconfig
> +++ b/arch/riscv/configs/rv32_defconfig
> @@ -15,6 +15,7 @@ CONFIG_CHECKPOINT_RESTORE=y
> CONFIG_BLK_DEV_INITRD=y
> CONFIG_EXPERT=y
> # CONFIG_SYSFS_SYSCALL is not set
> +CONFIG_PROFILING=y
> CONFIG_SOC_SIFIVE=y
> CONFIG_SOC_VIRT=y
> CONFIG_ARCH_RV32I=y
> --
> 2.25.1
>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
--
Regards,
Atish
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH v2] RISC-V: Enable profiling by default
2022-03-24 5:30 [PATCH v2] RISC-V: Enable profiling by default Anup Patel
2022-03-24 21:55 ` Atish Patra
@ 2022-03-31 22:31 ` Palmer Dabbelt
1 sibling, 0 replies; 3+ messages in thread
From: Palmer Dabbelt @ 2022-03-31 22:31 UTC (permalink / raw)
To: apatel
Cc: Paul Walmsley, atishp, Alistair Francis, anup, linux-riscv,
linux-kernel, apatel
On Wed, 23 Mar 2022 22:30:20 PDT (-0700), apatel@ventanamicro.com wrote:
> Let us enable profiling by default in RV32 and RV64 defconfigs so
> that we can use RISC-V PMU drivers on various RISC-V platforms.
>
> Signed-off-by: Anup Patel <apatel@ventanamicro.com>
> ---
> Changes since v1:
> - Enable CONFIG_PROFILING instead of CONFIG_PREF_EVENTS in defconfigs
> ---
> arch/riscv/configs/defconfig | 1 +
> arch/riscv/configs/rv32_defconfig | 1 +
> 2 files changed, 2 insertions(+)
>
> diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
> index f120fcc43d0a..bfebee46784c 100644
> --- a/arch/riscv/configs/defconfig
> +++ b/arch/riscv/configs/defconfig
> @@ -15,6 +15,7 @@ CONFIG_CHECKPOINT_RESTORE=y
> CONFIG_BLK_DEV_INITRD=y
> CONFIG_EXPERT=y
> # CONFIG_SYSFS_SYSCALL is not set
> +CONFIG_PROFILING=y
> CONFIG_SOC_MICROCHIP_POLARFIRE=y
> CONFIG_SOC_SIFIVE=y
> CONFIG_SOC_VIRT=y
> diff --git a/arch/riscv/configs/rv32_defconfig b/arch/riscv/configs/rv32_defconfig
> index 8b56a7f1eb06..2b68b1bd2559 100644
> --- a/arch/riscv/configs/rv32_defconfig
> +++ b/arch/riscv/configs/rv32_defconfig
> @@ -15,6 +15,7 @@ CONFIG_CHECKPOINT_RESTORE=y
> CONFIG_BLK_DEV_INITRD=y
> CONFIG_EXPERT=y
> # CONFIG_SYSFS_SYSCALL is not set
> +CONFIG_PROFILING=y
> CONFIG_SOC_SIFIVE=y
> CONFIG_SOC_VIRT=y
> CONFIG_ARCH_RV32I=y
Thanks, this is on for-next.
^ permalink raw reply [flat|nested] 3+ messages in thread
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2022-03-24 5:30 [PATCH v2] RISC-V: Enable profiling by default Anup Patel
2022-03-24 21:55 ` Atish Patra
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