From: Mathieu Poirier <mathieu.poirier@linaro.org>
To: Allen-KH Cheng <allen-kh.cheng@mediatek.com>
Cc: Ohad Ben-Cohen <ohad@wizery.com>,
Bjorn Andersson <bjorn.andersson@linaro.org>,
Rob Herring <robh+dt@kernel.org>,
Matthias Brugger <matthias.bgg@gmail.com>,
Tinghan Shen <tinghan.shen@mediatek.com>,
Project_Global_Chrome_Upstream_Group@mediatek.com,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
linux-mediatek@lists.infradead.org,
linux-arm-kernel@lists.infradead.org,
linux-remoteproc@vger.kernel.org
Subject: Re: [PATCH] remoteproc: mediatek: enable cache for mt8186 SCP
Date: Thu, 24 Mar 2022 09:56:28 -0600 [thread overview]
Message-ID: <20220324155628.GC3514576@p14s> (raw)
In-Reply-To: <20220322122845.4068-1-allen-kh.cheng@mediatek.com>
Hi Allen,
On Tue, Mar 22, 2022 at 08:28:45PM +0800, Allen-KH Cheng wrote:
> 1. Set SCP cache size before loading SCP FW. (8KB+8KB)
> 2. Adjust ipi_buf_offset from 0x7bdb0 to 0x3BDB0 for enableing cache
>
> SCP side
> - IPI Buffer: 0x3BDB0 <-> 0x3C000
> - Cache: 0x3C000 <-> 0x40000
>
I would also like to find in this changelog "why" this patch is needed and more
importantly, how it remains compatible with existing implementation. I am
mostly worried about implemenations where the application processor is using
caches while the SCP is not.
I will also need a couple of "Tested-by" tags before moving forward with this
patch.
Thanks,
Mathieu
> Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com>
> ---
> drivers/remoteproc/mtk_scp.c | 10 +++++++++-
> 1 file changed, 9 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/remoteproc/mtk_scp.c b/drivers/remoteproc/mtk_scp.c
> index 38609153bf64..24065b6b4da8 100644
> --- a/drivers/remoteproc/mtk_scp.c
> +++ b/drivers/remoteproc/mtk_scp.c
> @@ -401,6 +401,14 @@ static int mt8186_scp_before_load(struct mtk_scp *scp)
> writel(0x0, scp->reg_base + MT8186_SCP_L1_SRAM_PD_P1);
> writel(0x0, scp->reg_base + MT8186_SCP_L1_SRAM_PD_p2);
>
> + /*
> + * Set I-cache and D-cache size before loading SCP FW.
> + * SCP SRAM logical address may change when cache size setting differs.
> + */
> + writel(MT8183_SCP_CACHE_CON_WAYEN | MT8183_SCP_CACHESIZE_8KB,
> + scp->reg_base + MT8183_SCP_CACHE_CON);
> + writel(MT8183_SCP_CACHESIZE_8KB, scp->reg_base + MT8183_SCP_DCACHE_CON);
> +
> return 0;
> }
>
> @@ -905,7 +913,7 @@ static const struct mtk_scp_of_data mt8186_of_data = {
> .scp_da_to_va = mt8183_scp_da_to_va,
> .host_to_scp_reg = MT8183_HOST_TO_SCP,
> .host_to_scp_int_bit = MT8183_HOST_IPC_INT_BIT,
> - .ipi_buf_offset = 0x7bdb0,
> + .ipi_buf_offset = 0x3bdb0,
> };
>
> static const struct mtk_scp_of_data mt8192_of_data = {
> --
> 2.18.0
>
prev parent reply other threads:[~2022-03-24 15:57 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-03-22 12:28 [PATCH] remoteproc: mediatek: enable cache for mt8186 SCP Allen-KH Cheng
2022-03-24 15:56 ` Mathieu Poirier [this message]
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