From: Christoph Hellwig <hch@lst.de>
To: Heiko Stuebner <heiko@sntech.de>
Cc: palmer@dabbelt.com, paul.walmsley@sifive.com,
aou@eecs.berkeley.edu, linux-riscv@lists.infradead.org,
linux-kernel@vger.kernel.org, wefu@redhat.com,
liush@allwinnertech.com, guoren@kernel.org,
atishp@atishpatra.org, anup@brainfault.org, drew@beagleboard.org,
hch@lst.de, arnd@arndb.de, wens@csie.org, maxime@cerno.tech,
gfavor@ventanamicro.com, andrea.mondelli@huawei.com,
behrensj@mit.edu, xinhaoqu@huawei.com, mick@ics.forth.gr,
allen.baum@esperantotech.com, jscheid@ventanamicro.com,
rtrauben@gmail.com, samuel@sholland.org, cmuellner@linux.com,
philipp.tomsich@vrull.eu
Subject: Re: [PATCH v8 02/14] riscv: integrate alternatives better into the main architecture
Date: Thu, 31 Mar 2022 11:53:36 +0200 [thread overview]
Message-ID: <20220331095336.GB23422@lst.de> (raw)
In-Reply-To: <20220324000710.575331-3-heiko@sntech.de>
On Thu, Mar 24, 2022 at 01:06:58AM +0100, Heiko Stuebner wrote:
> Right now the alternatives need to be explicitly enabled and
> erratas are limited to SiFive ones.
>
> Over time with more SoCs and additional RiscV extensions, many more
> erratas or other patch-worthy features will emerge, so it doesn't
> really make sense to have the core alternatives able to get
> deactivated.
>
> So make it part of the core RiscV kernel and drop the main
> RISCV_ERRATA_ALTERNATIVES config symbol.
>
> This mimics how other architectures like for example arm64 handle
> their alternatives implementation.
For minimal kernels like the k210 it would be really good to be
able to avoid any not strictly neeed code. So I'd much rather
have the alternatives mechanism only built when it actually is needed,
not (semi-)unconditional.
next prev parent reply other threads:[~2022-03-31 9:53 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-03-24 0:06 [PATCH v8 00/14] riscv: support for Svpbmt and D1 memory types Heiko Stuebner
2022-03-24 0:06 ` [PATCH v8 01/14] riscv: prevent null-pointer dereference with sbi_remote_fence_i Heiko Stuebner
2022-03-31 9:51 ` Christoph Hellwig
2022-03-31 12:28 ` Heiko Stübner
2022-03-31 12:33 ` Christoph Hellwig
2022-04-07 18:50 ` Heiko Stübner
2022-03-24 0:06 ` [PATCH v8 02/14] riscv: integrate alternatives better into the main architecture Heiko Stuebner
2022-03-31 9:53 ` Christoph Hellwig [this message]
2022-03-24 0:06 ` [PATCH v8 03/14] riscv: allow different stages with alternatives Heiko Stuebner
2022-03-24 0:07 ` [PATCH v8 04/14] riscv: implement module alternatives Heiko Stuebner
2022-03-24 0:07 ` [PATCH v8 05/14] riscv: implement ALTERNATIVE_2 macro Heiko Stuebner
2022-03-31 9:56 ` Christoph Hellwig
2022-03-24 0:07 ` [PATCH v8 06/14] riscv: extend concatenated alternatives-lines to the same length Heiko Stuebner
2022-03-24 0:07 ` [PATCH v8 07/14] riscv: prevent compressed instructions in alternatives Heiko Stuebner
2022-03-31 9:56 ` Christoph Hellwig
2022-03-24 0:07 ` [PATCH v8 08/14] riscv: move boot alternatives to after fill_hwcap Heiko Stuebner
2022-03-31 9:57 ` Christoph Hellwig
2022-03-24 0:07 ` [PATCH v8 09/14] riscv: Fix accessing pfn bits in PTEs for non-32bit variants Heiko Stuebner
2022-03-31 9:59 ` Christoph Hellwig
2022-03-24 0:07 ` [PATCH v8 10/14] riscv: add cpufeature handling via alternatives Heiko Stuebner
2022-03-31 10:01 ` Christoph Hellwig
2022-04-08 16:13 ` Heiko Stübner
2022-03-24 0:07 ` [PATCH v8 11/14] riscv: add RISC-V Svpbmt extension support Heiko Stuebner
2022-03-31 10:03 ` Christoph Hellwig
2022-03-31 12:19 ` Heiko Stübner
2022-03-31 12:27 ` Christoph Hellwig
2022-03-31 12:29 ` Christoph Hellwig
2022-03-24 0:07 ` [PATCH v8 12/14] riscv: remove FIXMAP_PAGE_IO and fall back to its default value Heiko Stuebner
2022-03-31 10:03 ` Christoph Hellwig
2022-03-24 0:07 ` [PATCH v8 13/14] riscv: don't use global static vars to store alternative data Heiko Stuebner
2022-03-24 0:07 ` [PATCH v8 14/14] riscv: add memory-type errata for T-Head Heiko Stuebner
2022-03-31 2:24 ` [PATCH v8 00/14] riscv: support for Svpbmt and D1 memory types Palmer Dabbelt
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