public inbox for linux-kernel@vger.kernel.org
 help / color / mirror / Atom feed
From: Mathieu Poirier <mathieu.poirier@linaro.org>
To: Mike Leach <mike.leach@linaro.org>
Cc: suzuki.poulose@arm.com, coresight@lists.linaro.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, peterz@infradead.org,
	mingo@redhat.com, acme@kernel.org,
	linux-perf-users@vger.kernel.org, leo.yan@linaro.org
Subject: Re: [PATCH 05/10] coresight: etm3x: Use trace ID API to allocate IDs
Date: Tue, 5 Apr 2022 11:22:00 -0600	[thread overview]
Message-ID: <20220405172200.GB4151723@p14s> (raw)
In-Reply-To: <20220308205000.27646-6-mike.leach@linaro.org>

On Tue, Mar 08, 2022 at 08:49:55PM +0000, Mike Leach wrote:
> Use the TraceID API to allocate ETM trace IDs dynamically.
> 
> As with the etm4x we allocate on enable / disable for perf,
> allocate on enable / reset for sysfs.
> 
> Additionally we allocate on sysfs file read as both perf and sysfs
> can read the ID before enabling the hardware.
> 
> Remove sysfs option to write trace ID - which is inconsistent with
> both the dynamic allocation method and the fixed allocation method
> previously used.
> 
> Signed-off-by: Mike Leach <mike.leach@linaro.org>
> ---
>  drivers/hwtracing/coresight/coresight-etm.h   |  2 +
>  .../coresight/coresight-etm3x-core.c          | 72 ++++++++++++++++---
>  .../coresight/coresight-etm3x-sysfs.c         | 28 +++-----
>  3 files changed, 71 insertions(+), 31 deletions(-)
> 
> diff --git a/drivers/hwtracing/coresight/coresight-etm.h b/drivers/hwtracing/coresight/coresight-etm.h
> index f3ab96eaf44e..3667428d38b6 100644
> --- a/drivers/hwtracing/coresight/coresight-etm.h
> +++ b/drivers/hwtracing/coresight/coresight-etm.h
> @@ -287,4 +287,6 @@ int etm_get_trace_id(struct etm_drvdata *drvdata);
>  void etm_set_default(struct etm_config *config);
>  void etm_config_trace_mode(struct etm_config *config);
>  struct etm_config *get_etm_config(struct etm_drvdata *drvdata);
> +int etm_read_alloc_trace_id(struct etm_drvdata *drvdata);
> +void etm_release_trace_id(struct etm_drvdata *drvdata);
>  #endif
> diff --git a/drivers/hwtracing/coresight/coresight-etm3x-core.c b/drivers/hwtracing/coresight/coresight-etm3x-core.c
> index 7d413ba8b823..98213503bd09 100644
> --- a/drivers/hwtracing/coresight/coresight-etm3x-core.c
> +++ b/drivers/hwtracing/coresight/coresight-etm3x-core.c
> @@ -32,6 +32,7 @@
>  
>  #include "coresight-etm.h"
>  #include "coresight-etm-perf.h"
> +#include "coresight-trace-id.h"
>  
>  /*
>   * Not really modular but using module_param is the easiest way to
> @@ -490,18 +491,57 @@ static int etm_trace_id(struct coresight_device *csdev)
>  	return etm_get_trace_id(drvdata);
>  }
>  
> +int etm_read_alloc_trace_id(struct etm_drvdata *drvdata)
> +{
> +	int trace_id;
> +
> +	/*
> +	 * This will allocate a trace ID to the cpu,
> +	 * or return the one currently allocated.
> +	 */
> +	trace_id = coresight_trace_id_get_cpu_id(drvdata->cpu,
> +						 coresight_get_trace_id_map());
> +	if (trace_id > 0) {
> +		spin_lock(&drvdata->spinlock);
> +		drvdata->traceid = (u8)trace_id;
> +		spin_unlock(&drvdata->spinlock);
> +	} else {
> +		pr_err("Failed to allocate trace ID for %s on CPU%d\n",
> +		       dev_name(&drvdata->csdev->dev), drvdata->cpu);
> +	}
> +	return trace_id;
> +}
> +
> +void etm_release_trace_id(struct etm_drvdata *drvdata)
> +{
> +	coresight_trace_id_put_cpu_id(drvdata->cpu,
> +				      coresight_get_trace_id_map());
> +	spin_lock(&drvdata->spinlock);
> +	drvdata->traceid = 0;
> +	spin_unlock(&drvdata->spinlock);
> +}
> +
>  static int etm_enable_perf(struct coresight_device *csdev,
>  			   struct perf_event *event)
>  {
>  	struct etm_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
> +	int ret;
>  
>  	if (WARN_ON_ONCE(drvdata->cpu != smp_processor_id()))
>  		return -EINVAL;
>  
> +	ret = etm_read_alloc_trace_id(drvdata);
> +	if (ret < 0)
> +		return ret;
>

For etm4x, this was done after etm_parse_event_config().  Please do the same
here.


>  	/* Configure the tracer based on the session's specifics */
>  	etm_parse_event_config(drvdata, event);
>  	/* And enable it */
> -	return etm_enable_hw(drvdata);
> +	ret = etm_enable_hw(drvdata);
> +
> +	if (ret)
> +		etm_release_trace_id(drvdata);
> +	return ret;
>  }
>  
>  static int etm_enable_sysfs(struct coresight_device *csdev)
> @@ -510,6 +550,10 @@ static int etm_enable_sysfs(struct coresight_device *csdev)
>  	struct etm_enable_arg arg = { };
>  	int ret;
>  
> +	ret = etm_read_alloc_trace_id(drvdata);
> +	if (ret < 0)
> +		return ret;
> +

Please add the same comment as in etm4_disable_sysfs() in etm_disable_sysfs().

>  	spin_lock(&drvdata->spinlock);
>  
>  	/*
> @@ -532,6 +576,8 @@ static int etm_enable_sysfs(struct coresight_device *csdev)
>  
>  	if (!ret)
>  		dev_dbg(&csdev->dev, "ETM tracing enabled\n");
> +	else
> +		etm_release_trace_id(drvdata);
>  	return ret;
>  }
>  
> @@ -611,6 +657,8 @@ static void etm_disable_perf(struct coresight_device *csdev)
>  	coresight_disclaim_device_unlocked(csdev);
>  
>  	CS_LOCK(drvdata->base);
> +
> +	etm_release_trace_id(drvdata);
>  }
>  
>  static void etm_disable_sysfs(struct coresight_device *csdev)
> @@ -781,11 +829,6 @@ static void etm_init_arch_data(void *info)
>  	CS_LOCK(drvdata->base);
>  }
>  
> -static void etm_init_trace_id(struct etm_drvdata *drvdata)
> -{
> -	drvdata->traceid = coresight_get_trace_id(drvdata->cpu);
> -}
> -
>  static int __init etm_hp_setup(void)
>  {
>  	int ret;
> @@ -871,7 +914,6 @@ static int etm_probe(struct amba_device *adev, const struct amba_id *id)
>  	if (etm_arch_supported(drvdata->arch) == false)
>  		return -EINVAL;
>  
> -	etm_init_trace_id(drvdata);
>  	etm_set_default(&drvdata->config);
>  
>  	pdata = coresight_get_platform_data(dev);
> @@ -891,10 +933,12 @@ static int etm_probe(struct amba_device *adev, const struct amba_id *id)
>  		return PTR_ERR(drvdata->csdev);
>  
>  	ret = etm_perf_symlink(drvdata->csdev, true);
> -	if (ret) {
> -		coresight_unregister(drvdata->csdev);
> -		return ret;
> -	}
> +	if (ret)
> +		goto cs_unregister;
> +
> +	ret = etm_read_alloc_trace_id(drvdata);
> +	if (ret < 0)
> +		goto cs_unregister;
>  
>  	etmdrvdata[drvdata->cpu] = drvdata;
>  
> @@ -907,6 +951,10 @@ static int etm_probe(struct amba_device *adev, const struct amba_id *id)
>  	}
>  
>  	return 0;
> +
> +cs_unregister:
> +	coresight_unregister(drvdata->csdev);
> +	return ret;
>  }
>  
>  static void clear_etmdrvdata(void *info)
> @@ -922,6 +970,8 @@ static void etm_remove(struct amba_device *adev)
>  
>  	etm_perf_symlink(drvdata->csdev, false);
>  
> +	etm_release_trace_id(drvdata);
> +
>  	/*
>  	 * Taking hotplug lock here to avoid racing between etm_remove and
>  	 * CPU hotplug call backs.
> diff --git a/drivers/hwtracing/coresight/coresight-etm3x-sysfs.c b/drivers/hwtracing/coresight/coresight-etm3x-sysfs.c
> index e8c7649f123e..3ee70b174240 100644
> --- a/drivers/hwtracing/coresight/coresight-etm3x-sysfs.c
> +++ b/drivers/hwtracing/coresight/coresight-etm3x-sysfs.c
> @@ -86,6 +86,8 @@ static ssize_t reset_store(struct device *dev,
>  
>  		etm_set_default(config);
>  		spin_unlock(&drvdata->spinlock);
> +		/* release trace id outside the spinlock as this fn uses it */
> +		etm_release_trace_id(drvdata);
>  	}
>  
>  	return size;
> @@ -1189,30 +1191,16 @@ static DEVICE_ATTR_RO(cpu);
>  static ssize_t traceid_show(struct device *dev,
>  			    struct device_attribute *attr, char *buf)
>  {
> -	unsigned long val;
> -	struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent);
> -
> -	val = etm_get_trace_id(drvdata);
> -
> -	return sprintf(buf, "%#lx\n", val);
> -}
> -
> -static ssize_t traceid_store(struct device *dev,
> -			     struct device_attribute *attr,
> -			     const char *buf, size_t size)
> -{
> -	int ret;
> -	unsigned long val;
> +	int trace_id;
>  	struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent);
>  
> -	ret = kstrtoul(buf, 16, &val);
> -	if (ret)
> -		return ret;
> +	trace_id = etm_read_alloc_trace_id(drvdata);
> +	if (trace_id < 0)
> +		return trace_id;
>  
> -	drvdata->traceid = val & ETM_TRACEID_MASK;
> -	return size;
> +	return sprintf(buf, "%#x\n", trace_id);
>  }
> -static DEVICE_ATTR_RW(traceid);
> +static DEVICE_ATTR_RO(traceid);
>  
>  static struct attribute *coresight_etm_attrs[] = {
>  	&dev_attr_nr_addr_cmp.attr,
> -- 
> 2.17.1
> 

  reply	other threads:[~2022-04-05 21:14 UTC|newest]

Thread overview: 35+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-03-08 20:49 [PATCH 00/10] coresight: Add new API to allocate trace source ID values Mike Leach
2022-03-08 20:49 ` [PATCH 01/10] coresight: trace-id: Add API to dynamically assign trace " Mike Leach
2022-04-05 17:02   ` Mathieu Poirier
2022-04-06 19:45     ` Mike Leach
2022-04-07 18:08       ` Mathieu Poirier
2022-04-08 13:28         ` Mike Leach
2022-03-08 20:49 ` [PATCH 02/10] coresight: trace-id: Set up source trace ID map for system Mike Leach
2022-03-08 20:49 ` [PATCH 03/10] coresight: stm: Update STM driver to use Trace ID api Mike Leach
2022-03-08 20:49 ` [PATCH 04/10] coresight: etm4x: Use trace ID API to dynamically allocate trace ID Mike Leach
2022-04-05 17:25   ` Mathieu Poirier
2022-03-08 20:49 ` [PATCH 05/10] coresight: etm3x: Use trace ID API to allocate IDs Mike Leach
2022-04-05 17:22   ` Mathieu Poirier [this message]
2022-04-06 19:47     ` Mike Leach
2022-03-08 20:49 ` [PATCH 06/10] coresight: perf: traceid: Add perf notifiers for trace ID Mike Leach
2022-04-06 17:11   ` Mathieu Poirier
2022-04-06 19:38     ` Mike Leach
2022-04-07 17:46       ` Mathieu Poirier
2022-03-08 20:49 ` [PATCH 07/10] perf: cs-etm: Update event to read trace ID from sysfs Mike Leach
2022-03-08 20:49 ` [PATCH 08/10] coresight: Remove legacy Trace ID allocation mechanism Mike Leach
2022-05-17  3:56   ` liuqi (BA)
2022-05-18  9:07     ` Mike Leach
2022-03-08 20:49 ` [PATCH 09/10] coresight: etmX.X: stm: Remove unused legacy source trace ID ops Mike Leach
2022-03-08 20:50 ` [PATCH 10/10] coresight: trace-id: Add debug & test macros to trace id allocation Mike Leach
2022-03-22 10:43 ` [PATCH 00/10] coresight: Add new API to allocate trace source ID values Suzuki Kuruppassery Poulose
2022-03-22 11:38   ` Mike Leach
2022-03-22 12:35     ` Suzuki Kuruppassery Poulose
2022-03-22 14:27       ` Mike Leach
2022-03-22 18:52         ` Suzuki K Poulose
2022-03-23 10:07           ` Mike Leach
2022-03-23 10:35             ` Al Grant
2022-03-23 11:05               ` Mike Leach
2022-03-23 10:41             ` Suzuki Kuruppassery Poulose
2022-03-23 11:35               ` Mike Leach
2022-03-23 12:08                 ` Suzuki Kuruppassery Poulose
2022-04-04 16:15 ` Mathieu Poirier

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20220405172200.GB4151723@p14s \
    --to=mathieu.poirier@linaro.org \
    --cc=acme@kernel.org \
    --cc=coresight@lists.linaro.org \
    --cc=leo.yan@linaro.org \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-perf-users@vger.kernel.org \
    --cc=mike.leach@linaro.org \
    --cc=mingo@redhat.com \
    --cc=peterz@infradead.org \
    --cc=suzuki.poulose@arm.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox