From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 06841C433F5 for ; Sun, 10 Apr 2022 10:27:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232808AbiDJK3Y (ORCPT ); Sun, 10 Apr 2022 06:29:24 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37162 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230014AbiDJK3V (ORCPT ); Sun, 10 Apr 2022 06:29:21 -0400 Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1FC9463BF5 for ; Sun, 10 Apr 2022 03:27:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1649586431; x=1681122431; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=/cU/WapWQvkhhrNMrCPzh/gxIogDMTXN0gGrwGCnQo0=; b=ILAGsjVst4L6JAs8O5NCex3UZt6zOnjt2lV+LW3B5VjflAAsXlkRECXh wiRMsetYB3vLpG56H3G1p77eHF8p/7NzM7ckDkLSM4TiyBWyomL+O5cEu Lj1PNZPmgeW9znFobrrWY7+UNoz4TWl1YgK+LPU8n2FKdjnUGeQlEAy5f j5L5oJQp/Q7mp7v66dwTgs+NxqLkjEffqvo/G08bnCycQeARjG8+QNDZ4 EAjwHOOchbCW3SNPa6YrDrxvDw3bfHa1JDWX5h30OD22K8k/9hJu+P5jr KNDbXh4JYe4RHmfmagOGm2gJk8bts1SFVKW4t2UtiqzrFvDmMMLM8xRz7 Q==; X-IronPort-AV: E=McAfee;i="6400,9594,10312"; a="286962880" X-IronPort-AV: E=Sophos;i="5.90,249,1643702400"; d="scan'208";a="286962880" Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Apr 2022 03:27:09 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.90,249,1643702400"; d="scan'208";a="699019573" Received: from allen-box.sh.intel.com ([10.239.159.48]) by fmsmga001.fm.intel.com with ESMTP; 10 Apr 2022 03:27:05 -0700 From: Lu Baolu To: Joerg Roedel , Jason Gunthorpe , Christoph Hellwig , Kevin Tian , Ashok Raj , Will Deacon , Robin Murphy , Jean-Philippe Brucker Cc: Eric Auger , Liu Yi L , Jacob jun Pan , iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org, Lu Baolu Subject: [PATCH RFC v3 00/12] iommu: SVA and IOPF refactoring Date: Sun, 10 Apr 2022 18:24:31 +0800 Message-Id: <20220410102443.294128-1-baolu.lu@linux.intel.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi folks, The former part of this series refactors the IOMMU SVA code by assigning an SVA type of iommu_domain to a shared virtual address and replacing sva_bind/unbind iommu ops with attach/detach_dev_pasid domain ops. The latter part changes the existing I/O page fault handling framework from only serving SVA to a generic one. Any driver or component could handle the I/O page faults for its domain in its own way by installing an I/O page fault handler. This series overlaps with another series posted here [1]. For the convenience of review, I included all relevant patches in this series. We will solve the overlap problem later. This series is also available on github here [2]. [1] https://lore.kernel.org/lkml/20220315050713.2000518-1-jacob.jun.pan@linux.intel.com/ [2] https://github.com/LuBaolu/intel-iommu/commits/iommu-sva-refactoring-v3 Please help review and suggest. Best regards, baolu Change log: v1: - https://lore.kernel.org/linux-iommu/20220320064030.2936936-1-baolu.lu@linux.intel.com/ - Initial post. v2: - https://lore.kernel.org/linux-iommu/20220329053800.3049561-1-baolu.lu@linux.intel.com/ - Add sva domain life cycle management to avoid race between unbind and page fault handling. - Use a single domain for each mm. - Return a single sva handler for the same binding. - Add a new helper to meet singleton group requirement. - Rework the SVA domain allocation for arm smmu v3 driver and move the pasid_bit initialization to device probe. - Drop the patch "iommu: Handle IO page faults directly". - Add mmget_not_zero(mm) in SVA page fault handler. v3: - Rework iommu_group_singleton_lockdown() by adding a flag to the group that positively indicates the group can never have more than one member, even after hot plug. - Abstract the data structs used for iommu sva in a separated patches to make it easier for review. - I still keep the RFC prefix in this series as above two significant changes need at least another round review to be finalized. - Several misc refinements. Lu Baolu (12): iommu: Add pasid_bits field in struct dev_iommu iommu: Add a flag to indicate immutable singleton group iommu: Add attach/detach_dev_pasid domain ops iommu/sva: Basic data structures for SVA iommu/vt-d: Remove SVM_FLAG_SUPERVISOR_MODE support iommu/vt-d: Add SVA domain support arm-smmu-v3/sva: Add SVA domain support iommu/sva: Use attach/detach_pasid_dev in SVA interfaces iommu: Remove SVA related callbacks from iommu ops iommu: Prepare IOMMU domain for IOPF iommu: Per-domain I/O page fault handling iommu: Rename iommu-sva-lib.{c,h} include/linux/intel-iommu.h | 5 +- include/linux/iommu.h | 107 ++++-- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 25 +- .../iommu/{iommu-sva-lib.h => iommu-sva.h} | 8 +- .../iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c | 85 ++--- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 28 +- drivers/iommu/intel/iommu.c | 20 +- drivers/iommu/intel/svm.c | 135 +++---- drivers/iommu/io-pgfault.c | 71 +--- drivers/iommu/iommu-sva-lib.c | 71 ---- drivers/iommu/iommu-sva.c | 331 ++++++++++++++++++ drivers/iommu/iommu.c | 239 +++++++------ drivers/iommu/Makefile | 2 +- 13 files changed, 706 insertions(+), 421 deletions(-) rename drivers/iommu/{iommu-sva-lib.h => iommu-sva.h} (88%) delete mode 100644 drivers/iommu/iommu-sva-lib.c create mode 100644 drivers/iommu/iommu-sva.c -- 2.25.1