From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A8705C4332F for ; Tue, 12 Apr 2022 01:02:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1344567AbiDLBDm (ORCPT ); Mon, 11 Apr 2022 21:03:42 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59952 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1345115AbiDLA62 (ORCPT ); Mon, 11 Apr 2022 20:58:28 -0400 Received: from ams.source.kernel.org (ams.source.kernel.org [IPv6:2604:1380:4601:e00::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 451792FE73; Mon, 11 Apr 2022 17:50:40 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id F3308B819A7; Tue, 12 Apr 2022 00:50:38 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 23673C385A4; Tue, 12 Apr 2022 00:50:36 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1649724637; bh=rj7T6OOQgiD3IzTtd1FHQvgNOE0ybu1G9qy0seW6b6w=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=rAtqZqB3f9jjFyVZmyhwBU+XI8AvltGdctpMHQjfTDLi8Ego9HJGP3f4GS//3hpS4 23Xj+tcEMBT+fxrGSXdPw6k5pdsG/q2NB+4+xJ7tV1ThdXjH+pZKHRKTkCAv30kmD7 nsZrEs3vAGw+5lwYrACe0pXJVXEvwTdBLYnlba82a3n/dLEuRnWx7sBQnbba6Ee9FD 27HsXFl7iaAsbJKxHSWCoJp5RbH/FkEwVybKW+If/8JbSRwglEG+cUvNh0eEdkEyfb o61NGDRjok/tx5JfGNjuZ+38T0eqrG6S90wsrkk6DtUeecon060+KLab+uUIwrf5Yg F9lIbnnI5gO6Q== From: Sasha Levin To: linux-kernel@vger.kernel.org, stable@vger.kernel.org Cc: Chanho Park , Catalin Marinas , Mark Rutland , Will Deacon , James Morse , Sasha Levin , suzuki.poulose@arm.com, anshuman.khandual@arm.com, mathieu.poirier@linaro.org, lcherian@marvell.com, rmk+kernel@armlinux.org.uk, linux-arm-kernel@lists.infradead.org Subject: [PATCH AUTOSEL 5.10 29/30] arm64: Add part number for Arm Cortex-A78AE Date: Mon, 11 Apr 2022 20:49:03 -0400 Message-Id: <20220412004906.350678-29-sashal@kernel.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220412004906.350678-1-sashal@kernel.org> References: <20220412004906.350678-1-sashal@kernel.org> MIME-Version: 1.0 X-stable: review X-Patchwork-Hint: Ignore Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Chanho Park [ Upstream commit 83bea32ac7ed37bbda58733de61fc9369513f9f9 ] Add the MIDR part number info for the Arm Cortex-A78AE[1] and add it to spectre-BHB affected list[2]. [1]: https://developer.arm.com/Processors/Cortex-A78AE [2]: https://developer.arm.com/Arm%20Security%20Center/Spectre-BHB Cc: Catalin Marinas Cc: Mark Rutland Cc: Will Deacon Cc: James Morse Signed-off-by: Chanho Park Link: https://lore.kernel.org/r/20220407091128.8700-1-chanho61.park@samsung.com Signed-off-by: Will Deacon Signed-off-by: Sasha Levin --- arch/arm64/include/asm/cputype.h | 2 ++ arch/arm64/kernel/proton-pack.c | 1 + 2 files changed, 3 insertions(+) diff --git a/arch/arm64/include/asm/cputype.h b/arch/arm64/include/asm/cputype.h index bfbf0c4c7c5e..39f5c1672f48 100644 --- a/arch/arm64/include/asm/cputype.h +++ b/arch/arm64/include/asm/cputype.h @@ -75,6 +75,7 @@ #define ARM_CPU_PART_CORTEX_A77 0xD0D #define ARM_CPU_PART_NEOVERSE_V1 0xD40 #define ARM_CPU_PART_CORTEX_A78 0xD41 +#define ARM_CPU_PART_CORTEX_A78AE 0xD42 #define ARM_CPU_PART_CORTEX_X1 0xD44 #define ARM_CPU_PART_CORTEX_A510 0xD46 #define ARM_CPU_PART_CORTEX_A710 0xD47 @@ -123,6 +124,7 @@ #define MIDR_CORTEX_A77 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A77) #define MIDR_NEOVERSE_V1 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_NEOVERSE_V1) #define MIDR_CORTEX_A78 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A78) +#define MIDR_CORTEX_A78AE MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A78AE) #define MIDR_CORTEX_X1 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_X1) #define MIDR_CORTEX_A510 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A510) #define MIDR_CORTEX_A710 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A710) diff --git a/arch/arm64/kernel/proton-pack.c b/arch/arm64/kernel/proton-pack.c index 3dd489b62b29..6ae53d8cd576 100644 --- a/arch/arm64/kernel/proton-pack.c +++ b/arch/arm64/kernel/proton-pack.c @@ -861,6 +861,7 @@ u8 spectre_bhb_loop_affected(int scope) if (scope == SCOPE_LOCAL_CPU) { static const struct midr_range spectre_bhb_k32_list[] = { MIDR_ALL_VERSIONS(MIDR_CORTEX_A78), + MIDR_ALL_VERSIONS(MIDR_CORTEX_A78AE), MIDR_ALL_VERSIONS(MIDR_CORTEX_A78C), MIDR_ALL_VERSIONS(MIDR_CORTEX_X1), MIDR_ALL_VERSIONS(MIDR_CORTEX_A710), -- 2.35.1