From: Anup Patel <apatel@ventanamicro.com>
To: Paolo Bonzini <pbonzini@redhat.com>, Atish Patra <atishp@atishpatra.org>
Cc: Palmer Dabbelt <palmer@dabbelt.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Alistair Francis <Alistair.Francis@wdc.com>,
Anup Patel <anup@brainfault.org>,
kvm@vger.kernel.org, kvm-riscv@lists.infradead.org,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
Anup Patel <apatel@ventanamicro.com>
Subject: [PATCH 5/6] RISC-V: KVM: Reduce KVM_MAX_VCPUS value
Date: Tue, 12 Apr 2022 15:37:12 +0530 [thread overview]
Message-ID: <20220412100713.1415094-6-apatel@ventanamicro.com> (raw)
In-Reply-To: <20220412100713.1415094-1-apatel@ventanamicro.com>
Currently, the KVM_MAX_VCPUS value is 16384 for RV64 and 128
for RV32.
The KVM_MAX_VCPUS value is too high for RV64 and too low for
RV32 compared to other architectures (e.g. x86 sets it to 1024
and ARM64 sets it to 512). The too high value of KVM_MAX_VCPUS
on RV64 also leads to VCPU mask on stack consuming 2KB.
We set KVM_MAX_VCPUS to 1024 for both RV64 and RV32 to be
aligned other architectures.
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
arch/riscv/include/asm/kvm_host.h | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/riscv/include/asm/kvm_host.h b/arch/riscv/include/asm/kvm_host.h
index 806f74dc0bfc..61d8b40e3d82 100644
--- a/arch/riscv/include/asm/kvm_host.h
+++ b/arch/riscv/include/asm/kvm_host.h
@@ -16,8 +16,7 @@
#include <asm/kvm_vcpu_fp.h>
#include <asm/kvm_vcpu_timer.h>
-#define KVM_MAX_VCPUS \
- ((HGATP_VMID_MASK >> HGATP_VMID_SHIFT) + 1)
+#define KVM_MAX_VCPUS 1024
#define KVM_HALT_POLL_NS_DEFAULT 500000
--
2.25.1
next prev parent reply other threads:[~2022-04-12 11:27 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-04-12 10:07 [PATCH 0/6] KVM RISC-V Sv57x4 support and HFENCE improvements Anup Patel
2022-04-12 10:07 ` [PATCH 1/6] RISC-V: KVM: Use G-stage name for hypervisor page table Anup Patel
2022-04-12 10:07 ` [PATCH 2/6] RISC-V: KVM: Add Sv57x4 mode support for G-stage Anup Patel
2022-04-12 10:07 ` [PATCH 3/6] RISC-V: KVM: Treat SBI HFENCE calls as NOPs Anup Patel
2022-04-12 10:07 ` [PATCH 4/6] RISC-V: KVM: Introduce range based local HFENCE functions Anup Patel
2022-04-12 10:07 ` Anup Patel [this message]
2022-04-12 10:07 ` [PATCH 6/6] RISC-V: KVM: Add remote HFENCE functions based on VCPU requests Anup Patel
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