Re: [PATCH 2/2] clk: qcom: add sc8280xp GCC driver

[Stephen Boyd <sboyd@kernel.org>]

Quoting Bjorn Andersson (2022-04-08 15:43:21)
> diff --git a/drivers/clk/qcom/gcc-sc8280xp.c b/drivers/clk/qcom/gcc-sc8280xp.c
> new file mode 100644
> index 000000000000..e621a25a4a40
> --- /dev/null
> +++ b/drivers/clk/qcom/gcc-sc8280xp.c
> @@ -0,0 +1,7463 @@
> +// SPDX-License-Identifier: GPL-2.0-only
> +/*
> + * Copyright (c) 2021, The Linux Foundation. All rights reserved.
> + * Copyright (c) 2022, Linaro Ltd.
> + */
> +
> +#include <linux/clk-provider.h>
> +#include <linux/err.h>
> +#include <linux/kernel.h>
> +#include <linux/module.h>
> +#include <linux/of_device.h>
> +#include <linux/of.h>
> +#include <linux/regmap.h>
> +
> +#include <dt-bindings/clock/qcom,gcc-sc8280xp.h>
> +
> +#include "clk-alpha-pll.h"
> +#include "clk-branch.h"
[...]
> +
> +static struct clk_alpha_pll gcc_gpll0 = {
> +       .offset = 0x0,
> +       .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_LUCID],
> +       .clkr = {
> +               .enable_reg = 0x52028,
> +               .enable_mask = BIT(0),
> +               .hw.init = &(struct clk_init_data){

const

> +                       .name = "gcc_gpll0",
> +                       .parent_data = &(const struct clk_parent_data){
> +                               .fw_name = "bi_tcxo",

This can't be shared for multiple PLLs?

> +                       },
> +                       .num_parents = 1,
> +                       .ops = &clk_alpha_pll_fixed_lucid_5lpe_ops,
> +               },
> +       },
> +};
> +