RE: [PATCH 3/3] iommu/vt-d: Size Page Request Queue to avoid overflow condition

Tian, Kevin
2022-04-18T07:01:09Z

> From: Lu Baolu <baolu.lu@linux.intel.com>
> Sent: Saturday, April 16, 2022 8:31 PM
>
> PRQ overflow may cause I/O throughput congestion, resulting in unnecessary
> degradation of IO performance. Appropriately increasing the length of PRQ
> can greatly reduce the occurrence of PRQ overflow. The count of maximum
> page requests that can be generated in parallel by a PCIe device is
> statically defined in the Outstanding Page Request Capacity field of the
> PCIe ATS configure space.
>
> The new lenght of PRQ is calculated by summing up the value of Outstanding
> Page Request Capacity register across all devices where Page Requests are
> supported on the real PR-capable platfrom (Intel Sapphire Rapids). The
> result is round to the nearest higher power of 2.

The actual requirement is usage and platform specific. What about
doubling the default size and also provide an option for admin to
tune?

>
> The PRQ length is also double sized as the VT-d IOMMU driver only updates
> the Page Request Queue Head Register (PQH_REG) after processing the
> entire
> queue.
>
> Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
> ---
> include/linux/intel-svm.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/include/linux/intel-svm.h b/include/linux/intel-svm.h
> index b3b125b332aa..207ef06ba3e1 100644
> --- a/include/linux/intel-svm.h
> +++ b/include/linux/intel-svm.h
> @@ -9,7 +9,7 @@
> #define __INTEL_SVM_H__
>
> /* Page Request Queue depth */
> -#define PRQ_ORDER 2
> +#define PRQ_ORDER 4
> #define PRQ_RING_MASK ((0x1000 << PRQ_ORDER) - 0x20)
> #define PRQ_DEPTH ((0x1000 << PRQ_ORDER) >> 5)
>
> --
> 2.25.1