From: Lu Baolu <baolu.lu@linux.intel.com>
To: Jacob jun Pan <jacob.jun.pan@intel.com>,
Kevin Tian <kevin.tian@intel.com>,
Ashok Raj <ashok.raj@intel.com>, Liu Yi L <yi.l.liu@intel.com>
Cc: iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org,
Lu Baolu <baolu.lu@linux.intel.com>
Subject: [PATCH 3/3] iommu/vt-d: Size Page Request Queue to avoid overflow condition
Date: Sat, 16 Apr 2022 20:30:49 +0800 [thread overview]
Message-ID: <20220416123049.879969-4-baolu.lu@linux.intel.com> (raw)
In-Reply-To: <20220416123049.879969-1-baolu.lu@linux.intel.com>
PRQ overflow may cause I/O throughput congestion, resulting in unnecessary
degradation of IO performance. Appropriately increasing the length of PRQ
can greatly reduce the occurrence of PRQ overflow. The count of maximum
page requests that can be generated in parallel by a PCIe device is
statically defined in the Outstanding Page Request Capacity field of the
PCIe ATS configure space.
The new lenght of PRQ is calculated by summing up the value of Outstanding
Page Request Capacity register across all devices where Page Requests are
supported on the real PR-capable platfrom (Intel Sapphire Rapids). The
result is round to the nearest higher power of 2.
The PRQ length is also double sized as the VT-d IOMMU driver only updates
the Page Request Queue Head Register (PQH_REG) after processing the entire
queue.
Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
---
include/linux/intel-svm.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/linux/intel-svm.h b/include/linux/intel-svm.h
index b3b125b332aa..207ef06ba3e1 100644
--- a/include/linux/intel-svm.h
+++ b/include/linux/intel-svm.h
@@ -9,7 +9,7 @@
#define __INTEL_SVM_H__
/* Page Request Queue depth */
-#define PRQ_ORDER 2
+#define PRQ_ORDER 4
#define PRQ_RING_MASK ((0x1000 << PRQ_ORDER) - 0x20)
#define PRQ_DEPTH ((0x1000 << PRQ_ORDER) >> 5)
--
2.25.1
next prev parent reply other threads:[~2022-04-16 12:33 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-04-16 12:30 [PATCH 0/3] iommu/vt-d: Some fine tuning of SVA Lu Baolu
2022-04-16 12:30 ` [PATCH 1/3] iommu/vt-d: Set PGSNP bit in pasid table entry for sva binding Lu Baolu
2022-04-18 6:56 ` Tian, Kevin
2022-04-18 11:28 ` Lu Baolu
2022-04-16 12:30 ` [PATCH 2/3] iommu/vt-d: Drop stop marker messages Lu Baolu
2022-04-18 6:58 ` Tian, Kevin
2022-04-18 11:37 ` Lu Baolu
2022-04-16 12:30 ` Lu Baolu [this message]
2022-04-18 7:00 ` [PATCH 3/3] iommu/vt-d: Size Page Request Queue to avoid overflow condition Tian, Kevin
2022-04-18 11:44 ` Lu Baolu
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