From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C22EFC433EF for ; Sat, 23 Apr 2022 21:47:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237166AbiDWVud (ORCPT ); Sat, 23 Apr 2022 17:50:33 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40474 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234368AbiDWVub (ORCPT ); Sat, 23 Apr 2022 17:50:31 -0400 Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BE7BE49C94 for ; Sat, 23 Apr 2022 14:47:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1650750453; x=1682286453; h=date:from:to:cc:subject:message-id:mime-version; bh=lyqZ9gsvAvzC3O70exSSQBeEnXWIiW3L7GM6OShkzlk=; b=geb6/nL1BInHYbj3hNPEc4t5raKYQAo6B5wejBqaIkjaITkney8QYvc+ kDvTnxiwq9A3IzUN5beF5q58flP2LdEUNXijyhCo2Ozjb1k8C62sgYBoM BgdxZa/Q7/rDaZnD5t5At3wuReh2qVV2yOyfPp7LYQNVKnH9jCov8Kdwk D7DCe8WEhmNmWXeYfBkQILjZFy9J0VCkKg+clXHo1tQ7y+b7BH7h1s0yv 1lEk3VbBY0YmTDSNQS9xv+pAbdHAE0974qEFi5GI3w3yvfuGCAPeBbnNW Ldu+hXtW4eT4CMIZiyK/y5KjoMDIGvJZioao5h1Jr6CU0erKh/FBERzQa A==; X-IronPort-AV: E=McAfee;i="6400,9594,10326"; a="327877713" X-IronPort-AV: E=Sophos;i="5.90,285,1643702400"; d="scan'208";a="327877713" Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Apr 2022 14:47:33 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.90,285,1643702400"; d="scan'208";a="649130072" Received: from lkp-server01.sh.intel.com (HELO 5056e131ad90) ([10.239.97.150]) by FMSMGA003.fm.intel.com with ESMTP; 23 Apr 2022 14:47:31 -0700 Received: from kbuild by 5056e131ad90 with local (Exim 4.95) (envelope-from ) id 1niNbH-0000Vr-9i; Sat, 23 Apr 2022 21:47:31 +0000 Date: Sun, 24 Apr 2022 05:46:42 +0800 From: kernel test robot To: Tom Cc: kbuild-all@lists.01.org, linux-kernel@vger.kernel.org, Emil Renner Berthing Subject: [esmil:visionfive 22/56] drivers/soc/sifive/sifive_l2_cache.c:152:17: error: implicit declaration of function 'writeq'; did you mean 'writel'? Message-ID: <202204240511.jXvu17Rh-lkp@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org tree: https://github.com/esmil/linux visionfive head: 0729a282564fe3940277937536b1e67f98885c49 commit: 82d19ba510f9a07c18a011731401222caaffdb4a [22/56] sifive/sifive_l2_cache: Add sifive_l2_flush64_range function config: riscv-randconfig-r031-20220424 (https://download.01.org/0day-ci/archive/20220424/202204240511.jXvu17Rh-lkp@intel.com/config) compiler: riscv32-linux-gcc (GCC) 11.2.0 reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # https://github.com/esmil/linux/commit/82d19ba510f9a07c18a011731401222caaffdb4a git remote add esmil https://github.com/esmil/linux git fetch --no-tags esmil visionfive git checkout 82d19ba510f9a07c18a011731401222caaffdb4a # save the config file mkdir build_dir && cp config build_dir/.config COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-11.2.0 make.cross W=1 O=build_dir ARCH=riscv SHELL=/bin/bash drivers/soc/sifive/ If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot All errors (new ones prefixed by >>): drivers/soc/sifive/sifive_l2_cache.c: In function 'sifive_l2_flush64_range': >> drivers/soc/sifive/sifive_l2_cache.c:152:17: error: implicit declaration of function 'writeq'; did you mean 'writel'? [-Werror=implicit-function-declaration] 152 | writeq(line, l2_base + SIFIVE_L2_FLUSH64); | ^~~~~~ | writel cc1: some warnings being treated as errors vim +152 drivers/soc/sifive/sifive_l2_cache.c 123 124 #ifdef CONFIG_SIFIVE_L2_FLUSH 125 void sifive_l2_flush64_range(unsigned long start, unsigned long len) 126 { 127 unsigned long line; 128 129 if(!l2_base) { 130 pr_warn("L2CACHE: base addr invalid, skipping flush\n"); 131 return; 132 } 133 134 /* TODO: if (len == 0), skipping flush or going on? */ 135 if(!len) { 136 pr_debug("L2CACHE: flush64 range @ 0x%lx(len:0)\n", start); 137 return; 138 } 139 140 /* make sure the address is in the range */ 141 if(start < CONFIG_SIFIVE_L2_FLUSH_START || 142 (start + len) > (CONFIG_SIFIVE_L2_FLUSH_START + 143 CONFIG_SIFIVE_L2_FLUSH_SIZE)) { 144 pr_warn("L2CACHE: flush64 out of range: %lx(%lx), skip flush\n", 145 start, len); 146 return; 147 } 148 149 mb(); /* sync */ 150 for (line = start; line < start + len; 151 line += SIFIVE_L2_FLUSH64_LINE_LEN) { > 152 writeq(line, l2_base + SIFIVE_L2_FLUSH64); 153 mb(); 154 } 155 } 156 EXPORT_SYMBOL_GPL(sifive_l2_flush64_range); 157 #endif 158 -- 0-DAY CI Kernel Test Service https://01.org/lkp