Re: [PATCH 3/6] perf/tool/amd/ibs: Warn about sampling period skew

Robert Richter
2022-04-26T10:31:15Z

On 25.04.22 10:13:20, Ravi Bangoria wrote:

> @@ -29,3 +31,32 @@ void arch_evsel__fixup_new_cycles(struct perf_event_attr *attr)
>
> free(env.cpuid);
> }
> +
> +void arch_evsel__warn_ambiguity(struct evsel *evsel, struct perf_event_attr *attr)

Have an 'ibs_' string in the name?

> +{
> + struct perf_env *env = evsel__env(evsel);
> + struct perf_pmu *evsel_pmu = evsel__find_pmu(evsel);
> + struct perf_pmu *ibs_fetch_pmu = perf_pmu__find("ibs_fetch");
> + struct perf_pmu *ibs_op_pmu = perf_pmu__find("ibs_op");
> + static int warned_once;
> +
> + if (warned_once || !perf_env__cpuid(env) || !env->cpuid ||
> + !strstarts(env->cpuid, "AuthenticAMD") || !evsel_pmu)
> + return;
> +
> + if (ibs_fetch_pmu && ibs_fetch_pmu->type == evsel_pmu->type) {
> + if (attr->config & (1ULL << 59)) {
> + pr_warning(
> +"WARNING: Hw internally resets sampling period when L3 Miss Filtering is enabled\n"
> +"and tagged operation does not cause L3 Miss. This causes sampling period skew.\n");
> + warned_once = 1;
> + }
> + } else if (ibs_op_pmu && ibs_op_pmu->type == evsel_pmu->type) {
> + if (attr->config & (1ULL << 16)) {
> + pr_warning(
> +"WARNING: Hw internally resets sampling period when L3 Miss Filtering is enabled\n"
> +"and tagged operation does not cause L3 Miss. This causes sampling period skew.\n");

Avoid duplicate code. You could move it to the end of the function and
early return if the config bit is not set.

> + warned_once = 1;
> + }
> + }
> +}

-Robert