From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D68FAC433F5 for ; Tue, 26 Apr 2022 02:00:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233020AbiDZCD1 (ORCPT ); Mon, 25 Apr 2022 22:03:27 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51758 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S242287AbiDZCDS (ORCPT ); Mon, 25 Apr 2022 22:03:18 -0400 Received: from smtp-fw-6001.amazon.com (smtp-fw-6001.amazon.com [52.95.48.154]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8A09563BA; Mon, 25 Apr 2022 19:00:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amazon.com; i=@amazon.com; q=dns/txt; s=amazon201209; t=1650938406; x=1682474406; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=7BNsyQZVT5jXP8g4oMr4vuhO9XYpsWXBUXtXMRMNN58=; b=eNRaft1tjcZbkerr8ZLEhsJFZHAeiU/lbRdvF/nGCvvnH/vT/5I6cF9K W+EGxalbukj7L+t7+8o8QJkYqi8ZGMr861cDRs4uVoYcnfgL+tH+WkEj+ VJVorsn31gFcE7YdA2BlALIxAuB5Xj2+PKKvpqNqO+PMhgHvfjws3FoK5 4=; X-IronPort-AV: E=Sophos;i="5.90,289,1643673600"; d="scan'208";a="197607990" Received: from iad12-co-svc-p1-lb1-vlan3.amazon.com (HELO email-inbound-relay-iad-1a-b09d0114.us-east-1.amazon.com) ([10.43.8.6]) by smtp-border-fw-6001.iad6.amazon.com with ESMTP; 26 Apr 2022 02:00:03 +0000 Received: from EX13MTAUWB001.ant.amazon.com (iad12-ws-svc-p26-lb9-vlan3.iad.amazon.com [10.40.163.38]) by email-inbound-relay-iad-1a-b09d0114.us-east-1.amazon.com (Postfix) with ESMTPS id 528AB811D1; Tue, 26 Apr 2022 01:59:58 +0000 (UTC) Received: from EX13D02UWC002.ant.amazon.com (10.43.162.6) by EX13MTAUWB001.ant.amazon.com (10.43.161.207) with Microsoft SMTP Server (TLS) id 15.0.1497.32; Tue, 26 Apr 2022 01:59:34 +0000 Received: from EX13MTAUEA002.ant.amazon.com (10.43.61.77) by EX13D02UWC002.ant.amazon.com (10.43.162.6) with Microsoft SMTP Server (TLS) id 15.0.1497.32; Tue, 26 Apr 2022 01:59:34 +0000 Received: from dev-dsk-alisaidi-1d-b9a0e636.us-east-1.amazon.com (172.19.181.128) by mail-relay.amazon.com (10.43.61.169) with Microsoft SMTP Server id 15.0.1497.32 via Frontend Transport; Tue, 26 Apr 2022 01:59:33 +0000 Received: by dev-dsk-alisaidi-1d-b9a0e636.us-east-1.amazon.com (Postfix, from userid 5131138) id BF0EA20DC; Tue, 26 Apr 2022 01:59:33 +0000 (UTC) From: Ali Saidi To: , , , , , CC: , , , , , , , , , , , , , , , Subject: [PATCH v4 0/4] perf: arm-spe: Decode SPE source and use for perf c2c Date: Tue, 26 Apr 2022 01:59:21 +0000 Message-ID: <20220426015926.22011-1-alisaidi@amazon.com> X-Mailer: git-send-email 2.32.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org When synthesizing data from SPE, augment the type with source information for Arm Neoverse cores so we can detect situtions like cache line contention and transfers on Arm platforms. This changes enables future changes to c2c on a system with SPE where lines that are shared among multiple cores show up in perf c2c output. Changes in v6: * Drop changes to c2c command which will come from Leo Yan Changes in v5: * Add a new snooping type to disambiguate cache-to-cache transfers where we don't know if the data is clean or dirty. * Set snoop flags on all the data-source cases * Special case stores as we have no information on them Changes in v4: * Bring-in the kernel's arch/arm64/include/asm/cputype.h into tools/ * Add neoverse-v1 to the neoverse cores list Ali Saidi (4): tools: arm64: Import cputype.h perf arm-spe: Use SPE data source for neoverse cores perf mem: Support mem_lvl_num in c2c command perf mem: Support HITM for when mem_lvl_num is any tools/arch/arm64/include/asm/cputype.h | 258 ++++++++++++++++++ .../util/arm-spe-decoder/arm-spe-decoder.c | 1 + .../util/arm-spe-decoder/arm-spe-decoder.h | 12 + tools/perf/util/arm-spe.c | 110 +++++++- tools/perf/util/mem-events.c | 20 +- 5 files changed, 383 insertions(+), 18 deletions(-) create mode 100644 tools/arch/arm64/include/asm/cputype.h -- 2.32.0