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From: Peter Zijlstra <peterz@infradead.org>
To: Sandipan Das <sandipan.das@amd.com>
Cc: linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org,
	x86@kernel.org, bp@alien8.de, dave.hansen@linux.intel.com,
	acme@kernel.org, mark.rutland@arm.com,
	alexander.shishkin@linux.intel.com, namhyung@kernel.org,
	jolsa@kernel.org, tglx@linutronix.de, mingo@redhat.com,
	pbonzini@redhat.com, jmattson@google.com,
	like.xu.linux@gmail.com, eranian@google.com,
	ananth.narayan@amd.com, ravi.bangoria@amd.com,
	santosh.shukla@amd.com
Subject: Re: [PATCH v2 7/7] kvm: x86/cpuid: Fix CPUID leaf 0xA
Date: Tue, 26 Apr 2022 10:15:50 +0200	[thread overview]
Message-ID: <20220426081550.GO2731@worktop.programming.kicks-ass.net> (raw)
In-Reply-To: <54bc7fe4cadf6bdef823bab1fba43d4891d2e1a9.1650515382.git.sandipan.das@amd.com>

On Thu, Apr 21, 2022 at 11:16:59AM +0530, Sandipan Das wrote:
> On some x86 processors, CPUID leaf 0xA provides information
> on Architectural Performance Monitoring features. It
> advertises a PMU version which Qemu uses to determine the
> availability of additional MSRs to manage the PMCs.
> 
> Upon receiving a KVM_GET_SUPPORTED_CPUID ioctl request for
> the same, the kernel constructs return values based on the
> x86_pmu_capability irrespective of the vendor.
> 
> This leaf and the additional MSRs are not supported on AMD
> processors. If PerfMonV2 is detected, the PMU version is
> set to 2 and guest startup breaks because of an attempt to
> access a non-existent MSR. Return zeros to avoid this.
> 
> Fixes: a6c06ed1a60a ("KVM: Expose the architectural performance monitoring CPUID leaf")
> Reported-by: Vasant Hegde <vasant.hegde@amd.com>
> Signed-off-by: Sandipan Das <sandipan.das@amd.com>
> ---
>  arch/x86/kvm/cpuid.c | 5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c
> index 4b62d80bb22f..6bd65cad75ef 100644
> --- a/arch/x86/kvm/cpuid.c
> +++ b/arch/x86/kvm/cpuid.c
> @@ -872,6 +872,11 @@ static inline int __do_cpuid_func(struct kvm_cpuid_array *array, u32 function)
>  		union cpuid10_eax eax;
>  		union cpuid10_edx edx;
>  
> +		if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD) {

This is the obligatory question about HYGON; should they be included
here?

x86 is getting a number of me-too patches from both sides, where
behaviour has diverged for no raisin and then needs to be fixed up
again.

> +			entry->eax = entry->ebx = entry->ecx = entry->edx = 0;
> +			break;
> +		}
> +
>  		perf_get_x86_pmu_capability(&cap);
>  
>  		/*
> -- 
> 2.32.0
> 

  reply	other threads:[~2022-04-26  8:16 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-04-21  5:46 [PATCH v2 0/7] perf/x86/amd/core: Add AMD PerfMonV2 support Sandipan Das
2022-04-21  5:46 ` [PATCH v2 1/7] x86/cpufeatures: Add PerfMonV2 feature bit Sandipan Das
2022-04-21  5:46 ` [PATCH v2 2/7] x86/msr: Add PerfCntrGlobal* registers Sandipan Das
2022-04-21  5:46 ` [PATCH v2 3/7] perf/x86/amd/core: Detect PerfMonV2 support Sandipan Das
2022-04-21  5:46 ` [PATCH v2 4/7] perf/x86/amd/core: Detect available counters Sandipan Das
2022-04-21  5:46 ` [PATCH v2 5/7] perf/x86/amd/core: Add PerfMonV2 counter control Sandipan Das
2022-04-21  5:46 ` [PATCH v2 6/7] perf/x86/amd/core: Add PerfMonV2 overflow handling Sandipan Das
2022-04-21  5:46 ` [PATCH v2 7/7] kvm: x86/cpuid: Fix CPUID leaf 0xA Sandipan Das
2022-04-26  8:15   ` Peter Zijlstra [this message]
2022-04-26  8:40     ` Sandipan Das
2022-04-26 11:45       ` Wen Pu
2022-04-26 12:39         ` Peter Zijlstra

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