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Mon, 02 May 2022 20:10:58 +0300 (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (Client certificate not present) From: Yaroslav Bolyukin To: linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, amd-gfx@lists.freedesktop.org Cc: Thomas Zimmermann , Maxime Ripard , Maarten Lankhorst , Daniel Vetter , David Airlie , "Pan, Xinhui" , =?UTF-8?q?Christian=20K=C3=B6nig?= , Alex Deucher , Rodrigo Siqueira , Leo Li , Harry Wentland , "Lin, Wayne" , Jani Nikula , Yaroslav Bolyukin Subject: [RESEND PATCH v2 2/2] drm/amd: use fixed dsc bits-per-pixel from edid Date: Mon, 2 May 2022 20:10:31 +0300 Message-Id: <20220502171031.11797-2-iam@lach.pw> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220502171031.11797-1-iam@lach.pw> References: <20220220151940.58327-1-iam@lach.pw> <20220502171031.11797-1-iam@lach.pw> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org VESA vendor header from DisplayID spec may contain fixed bit per pixel rate, it should be respected by drm driver Signed-off-by: Yaroslav Bolyukin Reviewed-by: Wayne Lin --- drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c | 2 ++ drivers/gpu/drm/amd/display/dc/core/dc_stream.c | 3 ++- drivers/gpu/drm/amd/display/dc/dc_types.h | 3 +++ 3 files changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c index f5f39984702f..5565d55f56f9 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c @@ -119,6 +119,8 @@ enum dc_edid_status dm_helpers_parse_edid_caps( edid_caps->edid_hdmi = connector->display_info.is_hdmi; + edid_caps->dsc_fixed_bits_per_pixel_x16 = connector->display_info.dp_dsc_bpp; + sad_count = drm_edid_to_sad((struct edid *) edid->raw_edid, &sads); if (sad_count <= 0) return result; diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_stream.c b/drivers/gpu/drm/amd/display/dc/core/dc_stream.c index c4e871f358ab..65c90e432a39 100644 --- a/drivers/gpu/drm/amd/display/dc/core/dc_stream.c +++ b/drivers/gpu/drm/amd/display/dc/core/dc_stream.c @@ -105,6 +105,8 @@ static bool dc_stream_construct(struct dc_stream_state *stream, /* EDID CAP translation for HDMI 2.0 */ stream->timing.flags.LTE_340MCSC_SCRAMBLE = dc_sink_data->edid_caps.lte_340mcsc_scramble; + stream->timing.dsc_fixed_bits_per_pixel_x16 = + dc_sink_data->edid_caps.dsc_fixed_bits_per_pixel_x16; memset(&stream->timing.dsc_cfg, 0, sizeof(stream->timing.dsc_cfg)); stream->timing.dsc_cfg.num_slices_h = 0; @@ -773,4 +775,3 @@ void dc_stream_log(const struct dc *dc, const struct dc_stream_state *stream) } } } - diff --git a/drivers/gpu/drm/amd/display/dc/dc_types.h b/drivers/gpu/drm/amd/display/dc/dc_types.h index 2ba9f528c0fe..e53c414b6c93 100644 --- a/drivers/gpu/drm/amd/display/dc/dc_types.h +++ b/drivers/gpu/drm/amd/display/dc/dc_types.h @@ -228,6 +228,9 @@ struct dc_edid_caps { bool edid_hdmi; bool hdr_supported; + /* DisplayPort caps */ + uint32_t dsc_fixed_bits_per_pixel_x16; + struct dc_panel_patch panel_patch; }; -- 2.35.1