Re: [PATCH 0/6] PCI: mvebu: Add support for PME and AER interrupts

Pali Rohár
2022-05-06T14:23:02Z

On Friday 06 May 2022 15:40:23 Pali Rohár wrote:
> mvebu PCIe PME and AER interrupts are reported via PCIe summary
> interrupt. PCIe summary interrupt is reported via mvebu MPIC SoC error
> summary interrupt. And MPIC SoC error summary interrupt is reported via
> MPIC IRQ 4.
>
> This patch series implements support for interrupts in MPIC SoC error
> hierarchy in irq-armada-370-xp.c driver and support for interrupts in
> mvebu PCIe hierarchy in pci-mvebu.c.
>
> Finally PCIe PME and AER interrupts are routed to the correct PCIe Root
> Port, which allows kernel PME and AER drivers to take care of them.
>
> Tested on A385 board and kernel PME and AER drivers works correctly:
>
> [ 0.898482] pcieport 0000:00:01.0: PME: Signaling with IRQ 61
> [ 0.904422] pcieport 0000:00:01.0: AER: enabled with IRQ 61
> [ 0.910113] pcieport 0000:00:02.0: enabling device (0140 -> 0142)
> [ 0.916299] pcieport 0000:00:02.0: PME: Signaling with IRQ 62
> [ 0.922216] pcieport 0000:00:02.0: AER: enabled with IRQ 62
> [ 0.927917] pcieport 0000:00:03.0: enabling device (0140 -> 0142)
> [ 0.934090] pcieport 0000:00:03.0: PME: Signaling with IRQ 63
> [ 0.940006] pcieport 0000:00:03.0: AER: enabled with IRQ 63
>
> This change finally allows to debug PCIe issues on A385 boards.

FYI I tested that AER errors are now really handled by kernel AER driver:

[ 2733.258661] pcieport 0000:00:02.0: AER: Multiple Uncorrected (Non-Fatal) error received: 0000:02:00.0
[ 2733.258661] pcieport 0000:00:01.0: AER: Multiple Corrected error received: 0000:01:00.0
[ 2733.258682] pcieport 0000:00:01.0: PCIe Bus Error: severity=Corrected, type=Physical Layer, (Receiver ID)
[ 2733.267932] ath10k_pci 0000:02:00.0: PCIe Bus Error: severity=Uncorrected (Non-Fatal), type=Transaction Layer, (Requester ID)
[ 2733.275956] pcieport 0000:00:01.0: device [11ab:6820] error status/mask=00000001/00002000
[ 2733.285547] ath10k_pci 0000:02:00.0: device [168c:003c] error status/mask=00100000/00000000
[ 2733.296876] pcieport 0000:00:01.0: [ 0] RxErr (First)
[ 2733.305245] ath10k_pci 0000:02:00.0: [20] UnsupReq (First)
[ 2733.305251] ath10k_pci 0000:02:00.0: AER: TLP Header: 30000000 02080030 00000000 00000000
[ 2733.305282] ath10k_pci 0000:02:00.0: AER: can't recover (no error_detected callback)
[ 2733.313816] nvme 0000:01:00.0: PCIe Bus Error: severity=Corrected, type=Physical Layer, (Transmitter ID)
[ 2733.320671] pcieport 0000:00:02.0: AER: device recovery failed
[ 2733.327609] nvme 0000:01:00.0: device [1e0f:0001] error status/mask=00001041/00002000
[ 2733.367127] nvme 0000:01:00.0: [ 0] RxErr (First)
[ 2733.373591] nvme 0000:01:00.0: [ 6] BadTLP
[ 2733.379358] nvme 0000:01:00.0: [12] Timeout
[ 2733.385120] nvme 0000:01:00.0: AER: Error of this Agent is reported first

> Pali Rohár (6):
> dt-bindings: irqchip: armada-370-xp: Update information about MPIC SoC
> Error
> irqchip/armada-370-xp: Implement SoC Error interrupts
> ARM: dts: armada-38x.dtsi: Add node for MPIC SoC Error IRQ controller
> dt-bindings: PCI: mvebu: Update information about summary interrupt
> PCI: mvebu: Implement support for interrupts on emulated bridge
> ARM: dts: armada-385.dtsi: Add definitions for PCIe summary interrupts
>
> .../marvell,armada-370-xp-mpic.txt | 9 +
> .../devicetree/bindings/pci/mvebu-pci.txt | 1 +
> arch/arm/boot/dts/armada-385.dtsi | 20 +-
> arch/arm/boot/dts/armada-38x.dtsi | 5 +
> drivers/irqchip/irq-armada-370-xp.c | 213 +++++++++++++++++-
> drivers/pci/controller/pci-mvebu.c | 208 +++++++++++++++--
> 6 files changed, 426 insertions(+), 30 deletions(-)
>
> --
> 2.20.1
>