[PATCH 00/13] Mediatek MT6735 main clock and reset drivers

Yassine Oudjana
2022-05-04T12:28:45Z

This series adds support for the main clock and reset controllers on the
Mediatek MT6735 SoC:
- apmixedsys (global PLLs)
- topckgen (global divisors and muxes)
- infracfg (gates and resets for internal components)
- pericfg (gates and resets for peripherals)

MT6735 has other more specialized clock controllers, support for which is
not included in this series:
- imgsys (camera)
- mmsys (display)
- vdecsys (video decoder)
- audsys (audio)

Some symbols in common objects are exported to get the drivers to compile
as modules, and mtk_unregister_reset_controller() is implemented to allow
for unregistering reset controllers in the infracfg and pericfg drivers
when unloading them.

Yassine Oudjana (13):
dt-bindings: clock: Add Mediatek MT6735 clock bindings
dt-bindings: reset: Add MT6735 reset bindings
dt-bindings: arm: mediatek: Add MT6735 clock controller compatibles
clk: composite: Export clk_unregister_composite
clk: mediatek: Export mtk_free_clk_data
clk: mediatek: Add driver for MT6735 apmixedsys
clk: mediatek: Add driver for MT6735 topckgen
clk: mediatek: gate: Export mtk_clk_register_gates_with_dev
clk: mediatek: reset: Export mtk_register_reset_controller symbols
clk: mediatek: reset: Return mtk_reset pointer on register
clk: mediatek: reset: Implement mtk_unregister_reset_controller() API
clk: mediatek: Add driver for MT6735 infracfg
clk: mediatek: Add driver for MT6735 pericfg

.../arm/mediatek/mediatek,infracfg.yaml | 8 +-
.../arm/mediatek/mediatek,pericfg.yaml | 1 +
.../bindings/clock/mediatek,apmixedsys.yaml | 4 +-
.../bindings/clock/mediatek,topckgen.yaml | 4 +-
MAINTAINERS | 16 +
drivers/clk/clk-composite.c | 1 +
drivers/clk/mediatek/Kconfig | 28 +
drivers/clk/mediatek/Makefile | 4 +
drivers/clk/mediatek/clk-gate.c | 1 +
drivers/clk/mediatek/clk-mt6735-apmixed.c | 274 ++++
drivers/clk/mediatek/clk-mt6735-infracfg.c | 265 ++++
drivers/clk/mediatek/clk-mt6735-pericfg.c | 360 +++++
drivers/clk/mediatek/clk-mt6735-topckgen.c | 1159 +++++++++++++++++
drivers/clk/mediatek/clk-mtk.c | 1 +
drivers/clk/mediatek/clk-mtk.h | 8 +-
drivers/clk/mediatek/reset.c | 31 +-
.../clock/mediatek,mt6735-apmixedsys.h | 16 +
.../clock/mediatek,mt6735-infracfg.h | 25 +
.../clock/mediatek,mt6735-pericfg.h | 37 +
.../clock/mediatek,mt6735-topckgen.h | 79 ++
.../reset/mediatek,mt6735-infracfg.h | 31 +
.../reset/mediatek,mt6735-pericfg.h | 31 +
22 files changed, 2366 insertions(+), 18 deletions(-)
create mode 100644 drivers/clk/mediatek/clk-mt6735-apmixed.c
create mode 100644 drivers/clk/mediatek/clk-mt6735-infracfg.c
create mode 100644 drivers/clk/mediatek/clk-mt6735-pericfg.c
create mode 100644 drivers/clk/mediatek/clk-mt6735-topckgen.c
create mode 100644 include/dt-bindings/clock/mediatek,mt6735-apmixedsys.h
create mode 100644 include/dt-bindings/clock/mediatek,mt6735-infracfg.h
create mode 100644 include/dt-bindings/clock/mediatek,mt6735-pericfg.h
create mode 100644 include/dt-bindings/clock/mediatek,mt6735-topckgen.h
create mode 100644 include/dt-bindings/reset/mediatek,mt6735-infracfg.h
create mode 100644 include/dt-bindings/reset/mediatek,mt6735-pericfg.h

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2.36.0