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From: Yang Weijiang <weijiang.yang@intel.com>
To: pbonzini@redhat.com, jmattson@google.com, seanjc@google.com,
	like.xu.linux@gmail.com, vkuznets@redhat.com,
	kan.liang@linux.intel.com, wei.w.wang@intel.com,
	kvm@vger.kernel.org, linux-kernel@vger.kernel.org
Cc: Like Xu <like.xu@linux.intel.com>,
	Peter Zijlstra <peterz@infradead.org>,
	Andi Kleen <ak@linux.intel.com>,
	Yang Weijiang <weijiang.yang@intel.com>
Subject: [PATCH v12 01/16] perf/x86/intel: Fix the comment about guest LBR support on KVM
Date: Tue, 17 May 2022 11:40:45 -0400	[thread overview]
Message-ID: <20220517154100.29983-2-weijiang.yang@intel.com> (raw)
In-Reply-To: <20220517154100.29983-1-weijiang.yang@intel.com>

From: Like Xu <like.xu@linux.intel.com>

Starting from v5.12, KVM reports guest LBR and extra_regs support
when the host has relevant support. Just delete this part of the
comment and fix a typo incidentally.

Cc: Peter Zijlstra <peterz@infradead.org>
Reviewed-by: Kan Liang <kan.liang@linux.intel.com>
Reviewed-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Like Xu <like.xu@linux.intel.com>
Signed-off-by: Yang Weijiang <weijiang.yang@intel.com>
---
 arch/x86/events/intel/core.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
index f136be17c1e2..1c70ab856bf4 100644
--- a/arch/x86/events/intel/core.c
+++ b/arch/x86/events/intel/core.c
@@ -6494,8 +6494,7 @@ __init int intel_pmu_init(void)
 					  x86_pmu.intel_ctrl);
 	/*
 	 * Access LBR MSR may cause #GP under certain circumstances.
-	 * E.g. KVM doesn't support LBR MSR
-	 * Check all LBT MSR here.
+	 * Check all LBR MSR here.
 	 * Disable LBR access if any LBR MSRs can not be accessed.
 	 */
 	if (x86_pmu.lbr_tos && !check_msr(x86_pmu.lbr_tos, 0x3UL))
-- 
2.27.0


  reply	other threads:[~2022-05-17 15:42 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-05-17 15:40 [PATCH v12 00/16] Introduce Architectural LBR for vPMU Yang Weijiang
2022-05-17 15:40 ` Yang Weijiang [this message]
2022-05-17 15:40 ` [PATCH v12 02/16] perf/x86/lbr: Simplify the exposure check for the LBR_INFO registers Yang Weijiang
2022-05-17 15:40 ` [PATCH v12 03/16] KVM: x86: Report XSS as an MSR to be saved if there are supported features Yang Weijiang
2022-05-17 15:40 ` [PATCH v12 04/16] KVM: x86: Refresh CPUID on writes to MSR_IA32_XSS Yang Weijiang
2022-05-17 15:40 ` [PATCH v12 05/16] KVM: x86: Add Arch LBR MSRs to msrs_to_save_all list Yang Weijiang
2022-05-17 15:40 ` [PATCH v12 06/16] KVM: vmx/pmu: Emulate MSR_ARCH_LBR_DEPTH for guest Arch LBR Yang Weijiang
2022-05-17 15:40 ` [PATCH v12 07/16] KVM: vmx/pmu: Emulate MSR_ARCH_LBR_CTL " Yang Weijiang
2022-05-17 15:40 ` [PATCH v12 08/16] KVM: x86/pmu: Refactor code to support " Yang Weijiang
2022-05-17 15:40 ` [PATCH v12 09/16] KVM: x86: Refine the matching and clearing logic for supported_xss Yang Weijiang
2022-05-17 15:40 ` [PATCH v12 10/16] KVM: x86/vmx: Check Arch LBR config when return perf capabilities Yang Weijiang
2022-05-17 15:40 ` [PATCH v12 11/16] KVM: x86: Add XSAVE Support for Architectural LBR Yang Weijiang
2022-05-17 15:40 ` [PATCH v12 12/16] KVM: nVMX: Add necessary Arch LBR settings for nested VM Yang Weijiang
2022-05-17 15:40 ` [PATCH v12 13/16] KVM: x86/vmx: Clear Arch LBREn bit before inject #DB to guest Yang Weijiang
2022-05-17 15:40 ` [PATCH v12 14/16] KVM: x86/vmx: Flip Arch LBREn bit on guest state change Yang Weijiang
2022-05-17 15:40 ` [PATCH v12 15/16] KVM: x86: Add Arch LBR data MSR access interface Yang Weijiang
2022-05-17 15:41 ` [PATCH v12 16/16] KVM: x86/cpuid: Advertise Arch LBR feature in CPUID Yang Weijiang
2022-05-20 12:28 ` [PATCH v12 00/16] Introduce Architectural LBR for vPMU Paolo Bonzini

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