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From: tien.sung.ang@intel.com
To: mdf@kernel.org, hao.wu@intel.com, yilun.xu@intel.com, trix@redhat.com
Cc: linux-fpga@vger.kernel.org, linux-kernel@vger.kernel.org,
	tien.sung.ang@intel.com
Subject: Re: [PATCH] fpga: altera-cvp: Truncated bitstream error support
Date: Thu, 19 May 2022 12:34:12 +0800	[thread overview]
Message-ID: <20220519043412.2805706-1-tien.sung.ang@intel.com> (raw)
In-Reply-To: <3911c8c7-da6d-e6f2-c747-3b601d9cdacc@redhat.com>

The send_buf is always used throughout the life-span of the CvP driver.
Hence, we thought it would be wise to just pre-allocate it one time
at the start of the probe/init.
It is also fine if we do it in the altera_cvp_write. The only issue we
see in this is that, a minor hit on the performance as you need to 
then, allocate the buffer on every new CvP FPGA configuration write.

As for STEP 16, the previous implementation checks the Error latch bit
which stores the previous transaction's result. If an error occurs
prior to this, the driver would throw an error which is not right.
The correct step is to just check for the current CvP error status 
from the register.
Hope that is fine with you. Thanks

  reply	other threads:[~2022-05-19  4:34 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-05-18  6:48 [PATCH] fpga: altera-cvp: Truncated bitstream error support tien.sung.ang
2022-05-18 20:08 ` Tom Rix
2022-05-19  4:34   ` tien.sung.ang [this message]
2022-05-28 10:01     ` Xu Yilun
2022-05-28 10:03   ` Xu Yilun
2022-05-18 20:54 ` Christophe JAILLET
2022-05-19  4:21   ` tien.sung.ang
2022-05-28 10:08     ` Xu Yilun
2022-05-20  1:30   ` [PATCH v2] " tien.sung.ang
2022-05-28  9:59     ` Xu Yilun
2022-05-31  1:53       ` tien.sung.ang
2022-06-03  9:49         ` Xu Yilun
2022-06-07  5:55           ` tien.sung.ang
2022-06-08 10:30             ` Xu Yilun
2022-06-27  7:45               ` tien.sung.ang
2022-06-27  8:52                 ` Xu Yilun
  -- strict thread matches above, loose matches on Subject: below --
2022-05-18 14:04 [PATCH] fpga: altera-cvp: allow interrupt to continue next time Tom Rix
2022-05-19  9:39 ` [PATCH] fpga: altera-cvp: Truncated bitstream error support tien.sung.ang
2022-05-28 12:05   ` Xu Yilun

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