From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 37C20C433EF for ; Thu, 19 May 2022 07:24:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233568AbiESHYX (ORCPT ); Thu, 19 May 2022 03:24:23 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41952 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230176AbiESHYU (ORCPT ); Thu, 19 May 2022 03:24:20 -0400 Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1A8607E1CB for ; Thu, 19 May 2022 00:24:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1652945059; x=1684481059; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=ZDvJYhundGCWns+kwpd9ZcnKkKsMcbt1gCT7rtwkYrc=; b=X+1YAczA3AHsR2tBS7YRCiYbgZ3D93L/pm+o272K1T6mXqsHoxI3k0r0 gnMiHaq6maq9MLJqTY2/vyTk0jgY+h6aKxMnuZ4u14NQ5bDGaX4Y26wb9 oNa1z36n5aduTNBUQL9Sa2ZRMP7dX2lyJgkR+M5kcFd9vRiJwkZ3AxJSX h41pel82DHUpOZOf1fU3Q2G0YpIcxK026DS34bOS9nq99wM9Rs7Ejr21a hVFDT9Bjn1waUp8oL0KBhvWuPmE3kS9L/PNTCIZ0gJHCrBFlGe4I2aTWm SL2romqRtPq4cttEZ2phYHE4KwJizV6PelT86oB9+YETes1igx0gCCZ/L Q==; X-IronPort-AV: E=McAfee;i="6400,9594,10351"; a="272195824" X-IronPort-AV: E=Sophos;i="5.91,236,1647327600"; d="scan'208";a="272195824" Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 May 2022 00:24:18 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.91,236,1647327600"; d="scan'208";a="714852973" Received: from allen-box.sh.intel.com ([10.239.159.48]) by fmsmga001.fm.intel.com with ESMTP; 19 May 2022 00:24:15 -0700 From: Lu Baolu To: Joerg Roedel , Jason Gunthorpe , Christoph Hellwig , Kevin Tian , Ashok Raj , Will Deacon , Robin Murphy , Jean-Philippe Brucker , Dave Jiang , Vinod Koul Cc: Eric Auger , Liu Yi L , Jacob jun Pan , iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org, Lu Baolu Subject: [PATCH v7 00/10] iommu: SVA and IOPF refactoring Date: Thu, 19 May 2022 15:20:37 +0800 Message-Id: <20220519072047.2996983-1-baolu.lu@linux.intel.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi folks, The former part of this series refactors the IOMMU SVA code by assigning an SVA type of iommu_domain to a shared virtual address and replacing sva_bind/unbind iommu ops with attach/detach_dev_pasid domain ops. The latter part changes the existing I/O page fault handling framework from only serving SVA to a generic one. Any driver or component could handle the I/O page faults for its domain in its own way by installing an I/O page fault handler. This series has been functionally tested on an x86 machine and compile tested for other architectures. This series is also available on github: [2] https://github.com/LuBaolu/intel-iommu/commits/iommu-sva-refactoring-v7 Please review and suggest. Best regards, baolu Change log: v7: - Remove duplicate array for sva domain. - Rename detach_dev_pasid to block_dev_pasid. - Add raw device driver interfaces for iommufd. - Other misc refinements and patch reorganization. - Drop "dmaengine: idxd: Separate user and kernel pasid enabling" which has been picked for dmaengine tree. v6: - https://lore.kernel.org/linux-iommu/20220510061738.2761430-1-baolu.lu@linux.intel.com/ - Refine the SVA basic data structures. Link: https://lore.kernel.org/linux-iommu/YnFv0ps0Ad8v+7uH@myrica/ - Refine arm smmuv3 sva domain allocation. - Fix a possible lock issue. Link: https://lore.kernel.org/linux-iommu/YnFydE8j8l7Q4m+b@myrica/ v5: - https://lore.kernel.org/linux-iommu/20220502014842.991097-1-baolu.lu@linux.intel.com/ - Address review comments from Jean-Philippe Brucker. Very appreciated! - Remove redundant pci aliases check in device_group_immutable_singleton(). - Treat all buses exept PCI as static in immutable singleton check. - As the sva_bind/unbind() have already guaranteed sva domain free only after iopf_queue_flush_dev(), remove the unnecessary domain refcount. - Move domain get() out of the list iteration in iopf_handle_group(). v4: - https://lore.kernel.org/linux-iommu/20220421052121.3464100-1-baolu.lu@linux.intel.com/ - Solve the overlap with another series and make this series self-contained. - No objection to the abstraction of data structure during v3 review. Hence remove the RFC subject prefix. - Refine the immutable singleton group code according to Kevin's comments. v3: - https://lore.kernel.org/linux-iommu/20220410102443.294128-1-baolu.lu@linux.intel.com/ - Rework iommu_group_singleton_lockdown() by adding a flag to the group that positively indicates the group can never have more than one member, even after hot plug. - Abstract the data structs used for iommu sva in a separated patches to make it easier for review. - I still keep the RFC prefix in this series as above two significant changes need at least another round review to be finalized. - Several misc refinements. v2: - https://lore.kernel.org/linux-iommu/20220329053800.3049561-1-baolu.lu@linux.intel.com/ - Add sva domain life cycle management to avoid race between unbind and page fault handling. - Use a single domain for each mm. - Return a single sva handler for the same binding. - Add a new helper to meet singleton group requirement. - Rework the SVA domain allocation for arm smmu v3 driver and move the pasid_bit initialization to device probe. - Drop the patch "iommu: Handle IO page faults directly". - Add mmget_not_zero(mm) in SVA page fault handler. v1: - https://lore.kernel.org/linux-iommu/20220320064030.2936936-1-baolu.lu@linux.intel.com/ - Initial post. Lu Baolu (10): iommu: Add pasids field in struct iommu_device iommu: Remove SVM_FLAG_SUPERVISOR_MODE support iommu/sva: Add iommu_sva_domain support iommu/vt-d: Add SVA domain support arm-smmu-v3/sva: Add SVA domain support iommu/sva: Refactoring iommu_sva_bind/unbind_device() iommu: Remove SVA related callbacks from iommu ops iommu: Prepare IOMMU domain for IOPF iommu: Per-domain I/O page fault handling iommu: Rename iommu-sva-lib.{c,h} include/linux/intel-iommu.h | 8 +- include/linux/intel-svm.h | 13 - include/linux/iommu.h | 113 +++++-- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 21 +- .../iommu/{iommu-sva-lib.h => iommu-sva.h} | 16 + drivers/dma/idxd/cdev.c | 2 +- drivers/dma/idxd/init.c | 24 +- .../iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c | 89 +++--- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 12 +- drivers/iommu/intel/dmar.c | 4 + drivers/iommu/intel/iommu.c | 9 +- drivers/iommu/intel/svm.c | 135 +++----- drivers/iommu/io-pgfault.c | 73 +---- drivers/iommu/iommu-sva-lib.c | 71 ----- drivers/iommu/iommu-sva.c | 297 ++++++++++++++++++ drivers/iommu/iommu.c | 191 +++++------ drivers/misc/uacce/uacce.c | 2 +- drivers/iommu/Makefile | 2 +- 18 files changed, 629 insertions(+), 453 deletions(-) rename drivers/iommu/{iommu-sva-lib.h => iommu-sva.h} (80%) delete mode 100644 drivers/iommu/iommu-sva-lib.c create mode 100644 drivers/iommu/iommu-sva.c -- 2.25.1