From: Shreenidhi Shedi <yesshedi@gmail.com>
To: srivatsa@csail.mit.edu, amakhalov@vmware.com, tglx@linutronix.de,
mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com,
hpa@zytor.com
Cc: virtualization@lists.linux-foundation.org, pv-drivers@vmware.com,
x86@kernel.org, linux-kernel@vger.kernel.org, yesshedi@gmail.com,
Shreenidhi Shedi <sshedi@vmware.com>
Subject: [PATCH v2] x86/vmware: use unsigned integer for shifting
Date: Fri, 20 May 2022 19:39:54 +0530 [thread overview]
Message-ID: <20220520140954.597725-1-sshedi@vmware.com> (raw)
From: Shreenidhi Shedi <yesshedi@gmail.com>
From: Shreenidhi Shedi <sshedi@vmware.com>
Shifting signed 32-bit value by 31 bits is implementation-defined
behaviour. Using unsigned is better option for this.
Fixes: 4cca6ea04d31 ("x86/apic: Allow x2apic without IR on VMware platform")
Signed-off-by: Shreenidhi Shedi <sshedi@vmware.com>
---
arch/x86/kernel/cpu/vmware.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/x86/kernel/cpu/vmware.c b/arch/x86/kernel/cpu/vmware.c
index c04b933f48d3..cd809c5b17f0 100644
--- a/arch/x86/kernel/cpu/vmware.c
+++ b/arch/x86/kernel/cpu/vmware.c
@@ -28,6 +28,7 @@
#include <linux/cpu.h>
#include <linux/reboot.h>
#include <linux/static_call.h>
+#include <linux/bits.h>
#include <asm/div64.h>
#include <asm/x86_init.h>
#include <asm/hypervisor.h>
@@ -476,8 +477,8 @@ static bool __init vmware_legacy_x2apic_available(void)
{
uint32_t eax, ebx, ecx, edx;
VMWARE_CMD(GETVCPU_INFO, eax, ebx, ecx, edx);
- return (eax & (1 << VMWARE_CMD_VCPU_RESERVED)) == 0 &&
- (eax & (1 << VMWARE_CMD_LEGACY_X2APIC)) != 0;
+ return !(eax & BIT(VMWARE_CMD_VCPU_RESERVED)) &&
+ (eax & BIT(VMWARE_CMD_LEGACY_X2APIC))
}
#ifdef CONFIG_AMD_MEM_ENCRYPT
--
2.36.1
next reply other threads:[~2022-05-20 14:10 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-20 14:09 Shreenidhi Shedi [this message]
2022-05-20 15:41 ` [PATCH v2] x86/vmware: use unsigned integer for shifting Srivatsa S. Bhat
2022-05-20 23:25 ` Thomas Gleixner
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