From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2009AC433FE for ; Sat, 21 May 2022 03:51:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1354505AbiEUDvX (ORCPT ); Fri, 20 May 2022 23:51:23 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54802 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239084AbiEUDvP (ORCPT ); Fri, 20 May 2022 23:51:15 -0400 Received: from ams.source.kernel.org (ams.source.kernel.org [IPv6:2604:1380:4601:e00::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4A5A1DF66; Fri, 20 May 2022 20:51:14 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 00D87B82F13; Sat, 21 May 2022 03:51:13 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id A94B7C385A9; Sat, 21 May 2022 03:51:11 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1653105071; bh=Xco6TDsstzeb8QGFaDEm94Qv+grXMuUeEmeIJgPyqeI=; h=In-Reply-To:References:Subject:From:Cc:To:Date:From; b=XmnKdCDY+i5JbiJ7qwyW3AcnBgAPXj/NulbjpXx/DirO+9Ydh10sAZWGHjyqDFWWM 5iLwEa7EkIDJ6sApIFkIQHmGIdwrTjuDWxG6k5/gxSNjYpiIhknqCoGnoHmW42Z66m IRKLrGcHUAxrldEb+rs4lF/EK0PoREAHy9MJ84CDSO+qOyAEOp5V9+kToA26dEtRTU 0AJJDEhTlWIHwC5bmmItwb+bvIoYneJ2r4XtXe9VRsAm8wxKjzuGu4HMM1ANzTG74D VPVmvDwMyc2p+b+d7PNPUzFSo6eRmtSyGu/oKZjKzg/Ax7U9N92uw70NSscSQkxLzD ZEg0btM72ly7g== Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable In-Reply-To: <20220520100948.19622-1-johan+linaro@kernel.org> References: <20220520100948.19622-1-johan+linaro@kernel.org> Subject: Re: [PATCH 0/3] clk: qcom: gdsc: add support for collapse-vote registers From: Stephen Boyd Cc: Andy Gross , Michael Turquette , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, Johan Hovold , quic_tdas@quicinc.com, quic_rnayak@quicinc.com To: Bjorn Andersson , Johan Hovold Date: Fri, 20 May 2022 20:51:09 -0700 User-Agent: alot/0.10 Message-Id: <20220521035111.A94B7C385A9@smtp.kernel.org> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Please add Qualcomm on code for their hardware :) I did a translation from codeaurora but I don't know if Rajendra's will work. Quoting Johan Hovold (2022-05-20 03:09:45) > Recent Qualcomm platforms have APCS collapse-vote registers that allow > for sharing GDSCs with other masters (e.g. LPASS). How is it different from the voting logic that already exists in the gdsc file? Now every subsystem has to vote for off in addition to voting for on? > =20 > Add support for using such vote registers instead of the control > register when updating the GDSC power state.